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the index of the value being extracted is always an i32. This fixes PR3465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63597 91177308-0d34-0410-b5e6-96231b3b80d8
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crazy cases like:
struct f { int A, B, C, D, E, F; };
short test4() {
struct f A;
A.A = 1;
memset(&A.B, 2, 12);
return A.C;
}
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correct. We need more infrastructure before we can get the DebugLoc info for
these instructions.
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With the new world order, it can handle cases where the first
store into the alloca is an element of the vector, instead of
requiring the first analyzed store to have the vector type
itself. This allows us to un-xfail
test/CodeGen/X86/vec_ins_extract.ll.
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they are useful to analyses other than BasicAliasAnalysis.cpp. Include
the full comment for isIdentifiedObject in the header file. Thanks to
Chris for suggeseting this.
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created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
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into SimplifySetCC which gets called elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
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information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63577 91177308-0d34-0410-b5e6-96231b3b80d8
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SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.
Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63574 91177308-0d34-0410-b5e6-96231b3b80d8
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except LegalizeOp itself.
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option to make the -fno- form on the option. We also document the new
form in the CommandLine documentation.
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direction.
Live interval reconstruction needs to account for this, and scour its maps to
prevent dangling references.
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among others.
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Add an assert to check HasX86_64 status.
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tests. Thanks for the beautiful reduced testcase Duncan!
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performance reasons. Provide a single virtual interface for directives of all sizes in non-default address spaces.
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and remove trailing whitespace. No functionality
change.
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condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
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var-args, and don't allow FP return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
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crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
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different set iteration order for the reg_iterator.
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turn icmp eq a+x, b+x into icmp eq a, b if a+x or b+x has other uses. This
may have been increasing register pressure leading to the bzip2 slowdown.
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improvements to the EvaluateInDifferentType code. This code works
by just inserted a bunch of new code and then seeing if it is
useful. Instcombine is not allowed to do this: it can only insert
new code if it is useful, and only when it is converging to a more
canonical fixed point. Now that we iterate when DCE makes progress,
this causes an infinite loop when the code ends up not being used.
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