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2011-02-15Spelling fix: consequtive -> consecutive.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125563 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15Fix 9216 - Endless loop in InstCombine pass.Nadav Rotem
The pattern "A&(A^B) -> A & ~B" recreated itself because ~B is actually a xor -1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15Fix thinko. Cmp can be the first instruction in a MBB.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15Do not forget DebugLoc!Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15tidy up a bit.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15convert ConstantVector::get to use ArrayRef.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Remove unused bitvectors that record ARM callee-saved registers.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Move more fragments of spill weight calculation into CalcSpillWeights.hJakob Stoklund Olesen
Simplify the spill weight calculation a bit by bypassing getApproximateInstructionCount() and using LiveInterval::getSize() directly. This changes the computed spill weights, but only by a constant factor in each function. It should not affect how spill weights compare against each other, and so it shouldn't affect code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Do not hoist @llvm.dbg.value. Here, @llvm.dbg.value is "referring" a value ↵Devang Patel
that is modified inside loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Switch llvm to using comdats. For now always use groups with a singleRafael Espindola
section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125526 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Fix PR8854. Track inserted copies to avoid read before write. Sorry, it's ↵Evan Cheng
hard to reduce a sensible small test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14A fail to match coprocessor number and register number must fail instead of ↵Bruno Cardoso Lopes
assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14revert my ConstantVector patch, it seems to have made the llvm-gccChris Lattner
builders unhappy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Move broken HasCommonSymbols to ELFWriter.cpp.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes
- Add custom operand matching for imod and iflags. - Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC from mnemonic. - While adding ".w" as an operand, don't change "Head" to avoid passing the wrong mnemonic to ParseOperand. - Add asm parser tests. - Add disassembler tests just to make sure it can catch all cps versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Switch ConstantVector::get to use ArrayRef instead of a pointer+sizeChris Lattner
idiom. Change various clients to simplify their code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14fix PR9210 by implementing some type legalization logic for Chris Lattner
vector fp conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14fix two comment thinkosChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Add some statistics to StrongPHIElimination.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Add a statistic to PHIElimination tracking the number of critical edges split.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Enhance ComputeMaskedBits to know that aligned frameindexesChris Lattner
have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Revisit my fix for PR9028: the issue is that DAGCombine was Chris Lattner
generating i8 shift amounts for things like i1024 types. Add an assert in getNode to prevent this from occuring in the future, fix the buggy transformation, revert my previous patch, and document this gotcha in ISDOpcodes.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125465 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13remove a now-unneccesary cast.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Remove pointless blank line.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Teach instsimplify that X+Y>=X+Z is the same as Y>=Z if neither side overflows,Duncan Sands
plus some variations of this. According to my auto-simplifier this occurs a lot but usually in combination with max/min idioms. Because max/min aren't handled yet this unfortunately doesn't have much effect in the testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Fix a regression from r125393;Nadav Rotem
It caused a crash in MultiSource/Benchmarks/Bullet. Opt hit an assertion with "opt -std-compile-opts" because Constant::getAllOnesValue doesn't know how to handle floats. This patch added a test to reproduce the problem and a check that the destination vector is of integer type. Thank you Benjamin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125459 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13when legalizing extremely wide shifts, make sure that Chris Lattner
the shift amounts are in a suitably wide type so that we don't generate out of range constant shift amounts. This fixes PR9028. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13fix visitShift to properly zero extend the shift amount if the provided operandChris Lattner
is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13implement instcombine folding for things like (x >> c) < 42.Chris Lattner
We were previously simplifying divisions, but not right shifts! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13refactor some code out into a helper method.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13teach SCEV that the scale and addition of an inbounds gep don't NSW.Chris Lattner
This fixes a FIXME in scev-aa.ll (allowing a new no-alias result) and generally makes things more precise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12Add encodings and mnemonics for FXSAVE64 and FXRSTOR64.Reid Kleckner
These are just FXSAVE and FXRSTOR with REX.W prefixes. These versions use 64-bit pointer values instead of 32-bit pointer values in the memory map they dump and restore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12SimplifyLibCalls: Add missing legalize check on various printf to puts andDaniel Dunbar
putchar transforms, their return values are not compatible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12Add a note about SSE4.1 roundss/roundsd.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12A fix for 9165.Nadav Rotem
The DAGCombiner created illegal BUILD_VECTOR operations. The patch added a check that either illegal operations are allowed or that the created operation is legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125435 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12AsmMatcher custom operand parser failure enhancements.Jim Grosbach
Teach the AsmMatcher handling to distinguish between an error custom-parsing an operand and a failure to match. The former should propogate the error upwards, while the latter should continue attempting to parse with alternative matchers. Update the ARM asm parser accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Also fold (A+B) == A -> B == 0 when the add is commuted.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Per discussion with Dan G, inbounds geps *certainly* can haveChris Lattner
unsigned overflow (e.g. "gep P, -1"), and while they can have signed wrap in theoretical situations, modelling an AddRec as not having signed wrap is going enough for any case we can think of today. In the future if this isn't enough, we can revisit this. Modeling them as having NUW isn't causing any known problems either FWIW. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125410 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11When lowering an inbounds gep, the intermediate adds can haveChris Lattner
unsigned overflow (e.g. due to a negative array index), but the scales on array size multiplications are known to not sign wrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Adds llvm::sys::path::is_separator() to test whether a char is a path separatorZhanyong Wan
on the host OS. Reviewed by dgregor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Implement sdiv & udiv for <4 x i16> and <8 x i8> NEON vector types.Nate Begeman
This avoids moving each element to the integer register file and calling __divsi3 etc. on it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125402 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11SimplifySelectOps can only handle selects with a scalar condition. Add a checkNadav Rotem
that the condition is not a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Fix 9173.Nadav Rotem
Add more folding patterns to constant expressions of vector selects and vector bitcasts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125393 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Fix #9190Nadav Rotem
The bug happens when the DAGCombiner attempts to optimize one of the patterns of the SUB opcode. It tries to create a zero of type v2i64. This type is legal on 32bit machines, but the initializer of this vector (i64) is target dependent. Currently, the initializer attempts to create an i64 zero constant, which fails. Added a flag to tell the DAGCombiner to create a legal zero, if we require that the pass would generate legal types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11More whitespace cleanup...Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Make LoopUnswitch preserve ScalarEvolution by just forgetting everything aboutCameron Zwarich
a loop when unswitching it. It only does this in the complex case, because everything should be fine already in the simple case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11LoopInstSimplify preserves ScalarEvolution.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11make ConstantExpr::replaceUsesOfWithOnConstant preserve the inboundsChris Lattner
flag. Noticed by Jin Gu Kang! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11make the constantexpr interfaces for inbounds GEPs follow the same styleChris Lattner
as other constantexpr flags, reducing redundancy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125365 91177308-0d34-0410-b5e6-96231b3b80d8
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