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2011-07-06Introduce "expect" intrinsic instructions.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that aKevin Enderby
push with a small constant produces a 2-byte push. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Remove the ObjC ARC passes from the default optimization list, and addDan Gohman
extension points to be used by clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Preserve debug loc.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Use memcmp.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Really fix typo :-(Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix typo.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05By default mkstemp() creates a temporary file with mode 0600, but the modeChad Rosier
used for open is 0666. Therefore, add the necessary permission bits for consistency. rdar://8621462 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134430 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Break infinite loop when the Hopfield network oscillates.Jakob Stoklund Olesen
This is impossible in theory, I can prove it. In practice, our near-zero threshold can cause the network to oscillate between equally good solutions. <rdar://problem/9720596> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134428 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Compare all 4 bytes of the header.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, ↵Eli Friedman
use proper aliases for the pclmullqlqdq and friends. PR10269. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05indvars -disable-iv-rewrite: avoid multiple IVs in weird cases.Andrew Trick
Putting back the helper that I removed on 7/1 to do this right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05ARM estimateStackSize() needs to account for simplified call frames.Jim Grosbach
If the function allocates reserved stack space for callee argument frames, estimateStackSize() needs to account for that, as it doesn't show up as ordinary frame objects. Otherwise, a callee with a large argument list will throw off the calculations for whether to allocate an emergency spill slot and we get assert() failures in the register scavenger. rdar://9715469 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix PR10277.Jakob Stoklund Olesen
Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Tweak comment and debug output.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix warnings.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04PR10267: Don't combine an equality compare with an AND into an inequality ↵Benjamin Kramer
compare when the AND has more than one use. This can pessimize code, inequalities are generally more expensive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134379 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Remove accidentaly left node from previous iteration of the patch.Roman Divacky
Noticed by Benjamin Kramer! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Move early tail duplication earlier.Rafael Espindola
This fixes the issue noted in PR10251 where early tail dup of bbs with indirectbr would cause a bb to be duplicated into a loop preheader and then into its predecessors, creating phi nodes with identical operands just before register allocation. This helps with jsinterp.o size (__TEXT goes from 163568 to 126656) and a bit with performance 1.005x faster on sunspider (jits still enabled). The result on webkit with the jit disabled is more significant: 1.021x faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Move most of the pre BB code to TailDuplicateAndUpdate. Change theRafael Espindola
HasIndirectbr variable to be just that. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Reduce indentation and fix the count of how many PHIs we have inserted.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Fix PR10244.Jakob Stoklund Olesen
A split point inserted in a block with a landing pad successor may be hoisted above the call to ensure that it dominates all successors. The code that handles the rest of the basic block must take this into account. I am not including a test case, it would be very fragile. PR10244 comes from building clang with exceptions enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-03Make the i64 and f64 be 64bit ABI aligned in the target description.Roman Divacky
This is what both the ABI and clang says. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-03Fix an easy fixme.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Remove unused array.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Revert previous commit. It seems that whether casting to voidDuncan Sands
is valid or not depends on which system you build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Supress gcc-4.5 warning about the result not being used.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Use getVNInfoAt.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Consistent diagnostic capitalization and redundant context elimination.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen
asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Check the VN of the src register at the two copies, not just theRafael Espindola
register number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134309 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Include a source location when complaining about bad inline assembly.Jakob Stoklund Olesen
Add a MI->emitError() method that the backend can use to report errors related to inline assembly. Call it from X86FloatingPoint.cpp when the constraints are wrong. This enables proper clang diagnostics from the backend: $ clang -c pr30848.c pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack __asm__ ("" : "=u" (d)); /* { dg-error "output regs" } */ ^ 1 error generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02indvars -disable-iv-rewrite: bug fix involving weird geps and related cleanup.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134306 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Use a new strategy for preventing eviction loops in RAGreedy.Jakob Stoklund Olesen
Every live range is assigned a cascade number the first time it is involved in an eviction. As the evictor, it gets a new cascade number. Every evictee is assigned the same cascade number as the evictor. Eviction is prohibited if the evictor has a lower assigned cascade number than the evictee. This means that assigned cascade numbers are monotonically increasing with every eviction, yet they are bounded by NextCascade which can only be incremented by new live ranges. Thus, infinite loops cannot happen, but eviction cascades can still be triggered by new live ranges as we want. Thanks to Andy for explaining this to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Add getFeatureBits to extract feature bits for a given CPU.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Take a stab at fixing the llvm-x86_64-linux-checks failure.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01TargetConstant immediates won't be placed into registers so tightenEric Christopher
up the valid constant check earlier. rdar://9692967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add initial *-*-rtems* target, from Joel SherrillDouglas Gregor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add MCSubtargetInfo target registry stuff.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134279 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Teach IVUsers to stop at non-affine expressions unless they are bothDan Gohman
outside the loop and reducible. This more completely hides them from LSR, which isn't usually able to do anything meaningful with non-affine expressions anyway, and this consequently hides them from SCEVExpander, which is acutely unprepared for non-affine expressions. Replace test/CodeGen/X86/lsr-nonaffine.ll with a new test that tests the new behavior. This works around the bug in PR10117 / rdar://problem/9633149, and is generally an improvement besides. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134268 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Generalize @llvm.ctlz, @llvm.cttz, and @llvm.ctpop to work on vectors of ↵Owen Anderson
integers, and fix the one optimization pass that I'm aware of that needs updating for this. At least one current target, ARM NEON, can implement these operations on vectors directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134265 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Calling-convention specifications for illegal types are no-ops. Simplify ↵Eli Friedman
based on this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01ARMv7M vs. ARMv7E-M support.Jim Grosbach
The DSP instructions in the Thumb2 instruction set are an optional extension in the Cortex-M* archtitecture. When present, the implementation is considered an "ARMv7E-M implementation," and when not, an "ARMv7-M implementation." Add a subtarget feature hook for the v7e-m instructions and hook it up. The cortex-m3 cpu is an example of a v7m implementation, while the cortex-m4 is a v7e-m implementation. rdar://9572992 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01- Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng
itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Fix off-by-one error.Jim Grosbach
(low two bits always zero, so off by one bit of encoded value). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Pseudo-ize t2MOVCC[ri].Jim Grosbach
t2MOVCC[ri] are just t2MOV[ri] instructions, so properly pseudo-ize them. The Thumb1 versions, tMOVCC[ri] were only present for use by the size- reduction pass, so they're no longer necessary at all and can be deleted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134242 91177308-0d34-0410-b5e6-96231b3b80d8
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