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2011-03-15Propagate SCEV no-wrap flags whenever possible.Andrew Trick
This needs review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127638 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15If we don't know how long a string is we can't fold an _chk version to theEric Christopher
normal version. Fixes rdar://9123638 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling
can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better than this: _shuf: @ BB#0: @ %entry push {r4, r7, lr} add r7, sp, #4 sub sp, #12 mov r4, sp bic r4, r4, #7 mov sp, r4 mov r2, sp vmov d16, r0, r1 orr r0, r2, #6 orr r3, r2, #7 vst1.8 {d16[0]}, [r3] vst1.8 {d16[5]}, [r0] subs r4, r7, #4 orr r0, r2, #5 vst1.8 {d16[4]}, [r0] orr r0, r2, #4 vst1.8 {d16[4]}, [r0] orr r0, r2, #3 vst1.8 {d16[0]}, [r0] orr r0, r2, #2 vst1.8 {d16[2]}, [r0] orr r0, r2, #1 vst1.8 {d16[1]}, [r0] vst1.8 {d16[3]}, [r2] vldr.64 d16, [sp] vmov r0, r1, d16 mov sp, r4 pop {r4, r7, pc} The "illegal" testcase in vext.ll is no longer illegal. <rdar://problem/9078775> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Place context in member variables instead of passing around pointers.Jakob Stoklund Olesen
Use the opportunity to get rid of the trailing underscore variable names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Rename members to match LLVM naming conventions more closely.Jakob Stoklund Olesen
Remove the unused reserved_ bit vector, no functional change intended. This doesn't break 'svn blame', this file really is all my fault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Remove some dead patterns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127601 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14BIT_CONVERT has been renamed to BITCAST.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127600 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Minor optimization. sign-ext/anyext of undef is still undef.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Indentation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127595 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Negating a recurrence preserves no-self-wrap.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127593 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14HowFarToZero can compute a trip count as long as the recurrence has ↵Andrew Trick
no-self-wrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Added SCEV::NoWrapFlags to manage unsigned, signed, and self wrapAndrew Trick
properties. Added the self-wrap flag for SCEV::AddRecExpr. A slew of temporary FIXMEs indicate the intention of the no-self-wrap flag without changing behavior in this revision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14PTX: Emit global arrays with proper sizesJustin Holewinski
- Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127584 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14PTX: Add support for sqrt/sin/cos intrinsicsJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14ptx: add set.p instruction and related changes to predicate executionChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14This case is solved by Scalar Replacement of Aggregates (DT) andJin-Gu Kang
Early CSE pass so this patch reverts it to original source code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127574 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-13ptx: add basic support of predicate executionChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-13Add comment as following:Jin-Gu Kang
load and store reference same memory location, the memory location is represented by getelementptr with two uses (load and store) and the getelementptr's base is alloca with single use. At this point, instructions from alloca to store can be removed. (this pattern is generated when bitfield is accessed.) For example, %u = alloca %struct.test, align 4 ; [#uses=1] %0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2] %1 = load i8* %0, align 4 ; [#uses=1] %2 = and i8 %1, -16 ; [#uses=1] %3 = or i8 %2, 5 ; [#uses=1] store i8 %3, i8* %0, align 4 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-13Now that we are deleting unused live intervals during allocation, pointers ↵Jakob Stoklund Olesen
may be reused. Use the virtual register number as a cache tag instead. They are not reused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-13Tell the register allocator about new unused virtual registers.Jakob Stoklund Olesen
This allows the allocator to free any resources used by the virtual register, including physical register assignments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Build CompilerDriver library.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127554 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Teach ComputeMaskedBits about sub nsw.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Speculatively revert commit 127478 (jsjodin) in an attempt to fix theDuncan Sands
llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots. The original log entry: Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12This patch removes some of useless instructions generated by bitfield access.Jin-Gu Kang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Include snippets in the live stack interval.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Spill multiple registers at once.Jakob Stoklund Olesen
Live range splitting can create a number of small live ranges containing only a single real use. Spill these small live ranges along with the large range they are connected to with copies. This enables memory operand folding and maximizes the spill to fill distance. Work in progress with known bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Fixed the comparison operator for the enhancedSean Callanan
disassembler's disassembler map. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12That's it, I am declaring this a failure of the C++03 STL.Jakob Stoklund Olesen
There are too many compatibility problems with using mixed types in std::upper_bound, and I don't want to spend 110 lines of boilerplate setting up a call to a 10-line function. Binary search is not /that/ hard to implement correctly. I tried terminating the binary search with a linear search, but that actually made the algorithm slower against my expectation. Most live intervals have less than 4 segments. The early test against endIndex() does pay, and this version is 25% faster than plain std::upper_bound(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher
Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Add FIXME.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the sameJim Grosbach
actual instruction as the non-Darwin defs, but have different call-clobber semantics and so need separate patterns. They don't need to duplicate the encoding information, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Add a FIXME.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Pseudo-ize the ARM 'B' instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127509 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Pseudo-ize VMOVDcc and VMOVScc.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-1180 columnsJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach
effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Roll r127459 back in:Cameron Zwarich
Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Fix the GCC test suite issue exposed by r127477, which was caused by stackCameron Zwarich
protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Teach FastISel to support register-immediate-immediate instructions.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127496 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11ARM VDUPfd and VDUPfq can just be patterns. The instruction is the sameJim Grosbach
as for VDUP32d and VDUP32q, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32qJim Grosbach
and VDUPLN32d, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11ARM VREV64df and VREV64qf can just be patterns. The instruction is the sameJim Grosbach
as for VREV64d32 and VREV64q32, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11This FIXME has been fixed.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Properly pseudo-ize ARM MVNCCi.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Remove optimization emitting a reference insted of label difference, since ↵Jan Sjödin
it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar
created from the", it broke some GCC test suite tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127469 91177308-0d34-0410-b5e6-96231b3b80d8
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