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2011-10-16Twinify better.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Add AsmToken::getEndLoc and use it to add ranges to x86 asm register parsing.Benjamin Kramer
<stdin>:1:12: error: register %rax is only available in 64-bit mode incl %rax ^~~~ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16X86AsmParser: Synthesize EndLoc for tokens out of StartLoc + Length and ↵Benjamin Kramer
print ranges for invalid operands. <stdin>:1:4: error: invalid instruction mnemonic 'abc' abc incl %edi ^~~ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16PR11143: Save the old diagnostic handler and call it when munging ↵Benjamin Kramer
diagnostics for #line directives. This reenables proper inline asm diagnostics in clang git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Fix a bug in LowerV2I64Splat, which generated a BUILD_VECTOR for which there wasNadav Rotem
no pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, ↵Craig Topper
VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Add flags on Thumb2 indexed stores paralleling the flags on the indexed loads.Cameron Zwarich
These missing flags show up as errors when running -verify-coalescing on test-suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Fix an obvious typo found when looking at nearby code.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16remove the dead 'ShowLine' argument from SMDiagnostic.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Make SMDiagnostic a little more sane. Instead of passing around ↵Chris Lattner
note/warning/error as a string, pass it around as an enum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang ↵Chris Lattner
does. Enhance the X86 asmparser to produce ranges in the one case that was annoying me, for example: test.s:10:15: error: invalid operand for instruction movl 0(%rax), 0(%edx) ^~~~~~~ It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use ranges where appropriate if someone is interested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand ↵Craig Topper
3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16Add X86 feature detection support for BMI instructions. Added new cpuid ↵Craig Topper
function for accessing leafs with sub leafs specified in ECX. Also added code to keep track of the max cpuid level supported in both basic and extended leaves and qualified the existing cpuid calls and the new call to leaf 7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ↵Craig Topper
because these are the first VEX encoded instructions to use the reg field as an opcode extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15The CELL backend cannot select patterns for vector trunc-store and shl on ↵Nadav Rotem
v2i64; CellSPU/shift_ops.ll fails when promoting elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15ARM cannot select a pattern for trunc-store v4i8; /ARM/vrev.ll fails when ↵Nadav Rotem
promoting elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15SmallVector -> arrayBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Don't replace all dominated uses if there is only one use, since thatDuncan Sands
use can't be dominated, saving one domtree lookup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Add a bad char heuristic to StringRef::find.Benjamin Kramer
Based on Horspool's simplified version of Boyer-Moore. We use a constant-sized table of uint8_ts to keep cache thrashing low, needles bigger than 255 bytes are uncommon anyways. The worst case is still O(n*m) but we do a lot better on the average case now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Move the legalization of vector loads and stores into LegalizeVectorOps. In someNadav Rotem
cases we need the second type-legalization pass in order to support all cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Fix SCEVExpander assert during LSR: "argument of incompatible type".Andrew Trick
Just because we're dealing with a GEP doesn't mean we can assert the SCEV has a pointer type. The fix is simply to ignore the SCEV pointer type, which we really didn't need. Fixes PR11138 webkit crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142058 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Revert r142046, "Fix for llvm::sys::getHostTriple on Windows. Instead of ↵NAKAMURA Takumi
relying on the triple" It extremely breaks builds when optimization is enabled. Twine should not hold temporary objects. By the way, I might feel sad if I saw "i786-" "i1586-" or "iF86-". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Fix for llvm::sys::getHostTriple on Windows. Instead of relying on the tripleChad Rosier
from config.h, it discovers the triple based on the execution environment. Patch by Aaron Ballman <aaron@aaronballman.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Windows/Memory.inc: Support the ability to allocate memory "near" another ↵NAKAMURA Takumi
block of memory on Win32. It has fixed FIXME. Thanks to Aaron Ballman! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Fix indvars randomness by removing iteration over a map.Andrew Trick
I rewrote the algorithm a while back so it doesn't require map lookup, but neglected to change the data structure. This was caught by llvm-gcc self host, not because there's anything special about llvm-gcc, but because it is the only test for nondeterminism we currently have. Unit tests don't work well for everything; we should always try to have a nondeterminism stress test running. Fixes PR11133: llvm-gcc self host .o mismatch after enable-iv-rewrite=false git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142036 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Clear out the landing pad to call site map for each function.Bill Wendling
This isn't put into the 'clear()' method because the information needs to stick around (at least for a little bit) after the selection DAG is built. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142032 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Mark tADDrSPi as having side effects again.Jakob Stoklund Olesen
It really doesn't, but when r141929 removed the hasSideEffects flag from this instruction, it caused miscompilations. I am guessing that it got moved across a stack pointer update. Also clear isRematerializable after checking that this instruction is in fact never rematerialized in the nightly test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Thumb1 does not support dynamic stack realignment.Chad Rosier
rdar://10288916 is tracking this fix. In the past, instcombine and other passes were promoting alloca alignment past the natural alignment, resulting in dynamic stack realignment. Lang's work now prevents this from happening (LLVM commit r141599). Now that this really shouldn't happen report a fatal error rather than silently generate bad code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Mark registers as DEAD because they're really just clobbers.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add missing correctness check to ARMTargetLowering::ReconstructShuffle. ↵Eli Friedman
Fixes PR11129. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Make sure that the register is in the register class before adding it as a ↵Bill Wendling
machine op. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Mark the invoke call instruction as implicitly defining the callee-saved ↵Bill Wendling
registers. The callee-saved registers cannot be live across an invoke call because the control flow may continue along the exceptional edge. When this happens, all of the callee-saved registers are no longer valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14constify array itself, don't iterate multiple times.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Allow the source module to be materialized during the linking process.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Fix a non-firing assert. Change:Richard Trieu
assert("bad SymbolicOp.VariantKind"); To: assert(0 && "bad SymbolicOp.VariantKind"); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14ocaml bindings: add getopcode for constant and instruction, and int64_of_const.Torok Edwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14bindings: tab and indentation fixes of my previous commitsTorok Edwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141989 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14A few 80-col violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Disable code/data region symbols on ELF targets, where different mapping ↵Owen Anderson
symbols are used for ARM/Thumb mode code. This should only be re-enabled once we have a solution to properly distinguish these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141984 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add an implementation of the CanLowerReturn function to the PPC backendHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add f128 to datalayout string.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14initial test commit (remove whitespace)Hal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Update live-in lists when splitting critical edges.Jakob Stoklund Olesen
Fixes PR10814. Patch by Jan Sjödin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Revert r141932, r141936 and r141937.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Fix typo. "__sync_fetch_and-xor_4" should be "__sync_fetch_and_xor_4".Jim Grosbach
Pointed out by George Russell. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14An instruction's operands aren't necessarily instructions or constants. TheyNick Lewycky
could be arguments, for example. No testcase because this is a bug-fix broken out of a larger optimization patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add X86 ANDN instruction. Including instruction selection.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 ↵Craig Topper
processor which is gcc's name for Haswell. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Definition of function getMipsRegisterNumbering.Akira Hatanaka
Patch by Jack Carter and Reed Kotler at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141938 91177308-0d34-0410-b5e6-96231b3b80d8
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