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2013-04-18Mips assembler: formatting and comment changes.Jack Carter
This patch should not have any functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179737 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Add an option `-enable-old-style-attr-syntax' to print out function ↵Bill Wendling
attributes in the "old" style. It's sometimes beneficial to emit a testcase with the old style attribute syntax. Allow someone to do this. <rdar://problem/13563209> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179735 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[objc-arc] Added annotation option to only emit annotations for a specific ↵Michael Gottesman
ssa identifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179729 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Two small cleanups for ELF's templates.Rafael Espindola
* We only ever specialize these templates with an instantiation of ELFType, so we don't need a template template. * Replace LLVM_ELF_COMMA with just passing the individual parameters to the macro. This requires a second macro for when we only have ELFT, but that is still a small win. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179726 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Add support for subsections to the ELF assembler. Fixes PR8717.Peter Collingbourne
Differential Revision: http://llvm-reviews.chandlerc.com/D598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179725 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] These should be int64_t, not uint64_t.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179724 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Fixed typo.Michael Gottesman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179721 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier
unable to handle cases such as __asm mov eax, 8*-8. This patch also attempts to simplify the state machine. Further, the error reporting has been improved. Test cases included, but more will be added to the clang side shortly. rdar://13668445 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[objc-arc] Added descriptions for EnableARCAnnotations, ↵Michael Gottesman
EnableCheckForCFGHazards, EnableARCOptimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[objc-arc] Added an option to arc-annotations for turning off CheckForCFGHazard.Michael Gottesman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky
for the sdiv/srem/udiv/urem bitcode instructions. This is done for the i8, i16, and i32 types, as well as i64 for the x86_64 target. Patch by Jim Stichnoth git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179715 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17X86 cost model: Exit before calling getSimpleVT on non-simple VTsArnold Schwaighofer
getSimpleVT can only handle simple value types. radar://13676022 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179714 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17A limit of 500 was still a bit too high for some tests.Bill Wendling
PR15000 has a testcase where the time to compile was bordering on 30s. When I dropped the limit value to 100, it became a much more managable 6s. The compile time seems to increase in a roughly linear fashion based on increasing the limit value. (See the runtimes below.) So, let's lower the limit to 100 so that they can get a more reasonable compile time. Limit Value Time ----------- ---- 10 0.9744s 20 1.8035s 30 2.3618s 40 2.9814s 50 3.6988s 60 4.5486s 70 4.9314s 80 5.8012s 90 6.4246s 100 7.0852s 110 7.6634s 120 8.3553s 130 9.0552s 140 9.6820s 150 9.8804s 160 10.8901s 170 10.9855s 180 12.0114s 190 12.6816s 200 13.2754s 210 13.9942s 220 13.8097s 230 14.3272s 240 15.7753s 250 15.6673s 260 16.0541s 270 16.7625s 280 17.3823s 290 18.8213s 300 18.6120s 310 20.0333s 320 19.5165s 330 20.2505s 340 20.7068s 350 21.1833s 360 22.9216s 370 22.2152s 380 23.9390s 390 23.4609s 400 24.0426s 410 24.6410s 420 26.5208s 430 27.7155s 440 26.4142s 450 28.5646s 460 27.3494s 470 29.7255s 480 29.4646s 490 30.5001s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179713 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Fix treatment of ARM unallocated hint instructions.Quentin Colombet
The reference manual defines only 5 permitted values for the immediate field of the "hint" instruction: 1. nop (imm == 0) 2. yield (imm == 1) 3. wfe (imm == 2) 4. wfi (imm == 3) 5. sev (imm == 4) Therefore, restrict the permitted values for the "hint" instruction to 0 through 4. Patch by Mihail Popa <Mihail.Popa@arm.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Appease a gcc warning about an overflow in a constant conversion.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179703 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Don't store AttributeSet::FunctionIndex as an int.Benjamin Kramer
GCC complains: Core.cpp:1449:27: warning: overflow in implicit constant conversion [-Woverflow] I'm not sure if that's really a problem here, but using the enum type is better style anyways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17PowerPC: Mark some more patterns as isCodeGenOnly.Ulrich Weigand
A couple of recently introduced conditional branch patterns also need to be marked as isCodeGenOnly since they cannot be handled by the asm parser. No change in generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17R600: Make Export Instruction not duplicableVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17R600: Export is emitted as a CF_NATIVE instVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17R600: Emit used GPRs countVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179684 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Use StringSwitch instead of long chain of if-else. No functionality change.Alexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179682 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Create a stub for DWARF parser unittestsAlexey Samsonov
Moves one DWARF-specific header to include/llvm/DebugInfo from lib/. Add a short unittest for r179095. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179678 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Fix -Werror build.Evgeniy Stepanov
Broken in r179657. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179669 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Add support for the div/rem instructions under x86 fast-isel.Jim Stichnoth
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3385 Review URL: https://codereview.chromium.org/14261012
2013-04-17PR15149/r174304 improvement - print hex for unknown dwarf language codes & ↵David Blaikie
add a test case CR feedback from Rafael Espindola and Paul Robinson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179664 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Do not optimise fprintf() calls if its return value is used.Peter Collingbourne
Differential Revision: http://llvm-reviews.chandlerc.com/D620 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179661 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17Mips assembler: Enable handling of nested expressionsJack Carter
This patch allows the Mips assembler to parse and emit nested expressions as instruction operands. It also extends the expansion of memory instructions when an offset is given as an expression. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179657 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] Add support for parsing complex immediate expressions. TestChad Rosier
cases to be submitted on clang side shortly. rdar://13663768 and PR15760 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179655 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16C API: Add LLVMTargetMachineEmitToMemoryBuffer()Tom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179648 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16C API: Add LLVMGetBufferSize()Tom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179647 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16C API: Add LLVMGetBufferStart()Tom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179646 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16C API: Add LLVMAddTargetDependentFunctionAttr()Tom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179645 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Print out the target-independent attributes in a comment before the function ↵Bill Wendling
definition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179622 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Remove unused variable from previous refactor.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179611 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16[ms-inline asm] Refactor. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16[ms-inline asm] Remove some dead code.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Cleanup naming: DataLayout s/TD/DL/Eli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179601 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Fix build failure introduced in 179591 when assertions are disabled.Logan Chien
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Implement ARM unwind opcode assembler.Logan Chien
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179591 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Add four new functions and one new enum to the C API:Hans Wennborg
LLVMGetThreadLocalMode - exposes GlobalVariable::getThreadLocalMode LLVMSetThreadLocalMode - exposes GlobalVariable::setThreadLocalMode LLVMIsExternallyInitialized - exposes GlobalVariable::isExternallyInitialized LLVMSetExternallyInitialized - exposes GlobalVariable::setExternallyInitialized LLVMThreadLocalMode - maps to GlobalVariable::ThreadLocalMode Patch by Moritz Maxeiner! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16simplifycfg: Fix integer overflow converting switch into icmp.Hans Wennborg
If a switch instruction has a case for every possible value of its type, with the same successor, SimplifyCFG would replace it with an icmp ult, but the computation of the bound overflows in that case, which inverts the test. Patch by Jed Davis! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179587 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Add 64-bit multiply and divide instructions for SPARC v9.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179582 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15ARM: Add VACLT and VACLE assembly aliases.Jim Grosbach
These are aliases for VACGT and VACGE, respectively, with the source operands reversed. rdar://13638090 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179575 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15We are not able to bitcast a pointer to an integral value.Bill Wendling
Two return types are not equivalent if one is a pointer and the other is an integral. This is because we cannot bitcast a pointer to an integral value. PR15185 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179569 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15Mips assembler: Explicit floating point condition register recognition.Jack Carter
This patch allows the assembler to recognize $fcc0 as a valid register for conditional move instructions. Corresponding test cases have been added. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15SLPVectorizer: Make it a function pass and add code for hoisting the ↵Nadav Rotem
vector-gather sequence out of loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179562 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15PNaCl ABI checker: Disallow the "resume" instructionMark Seaborn
This instruction is used for C++ exception handling. It is only used inside basic blocks reached from landingpads, so it is stripped out by the "-lowerinvoke" pass. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3377 TEST=NaCl small_tests Review URL: https://codereview.chromium.org/13832006
2013-04-15R600/SI: Emit config values in register value pairs.Tom Stellard
Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15R600/SI: Emit configuration value in the .AMDGPU.config ELF sectionTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179545 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15R600: Emit ELF formatted code rather than raw ISA.Tom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179544 91177308-0d34-0410-b5e6-96231b3b80d8
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