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2013-05-14The customary LLVM way of obtaining intrinsics is withEli Bendersky
Intrinsic::getDeclaration and use the definition in include/llvm/Intrinsics.td This also makes the attribute on the intrinsic to be more consistent with the back-end (code-gen), which automatically assumes it's ReadNone (because this is what Intrinsics.td) defines. Using ReadNone rather than ReadOnly may be not strictly correct because the intrinsic depends on the value of the TP. However, this attribute is not really used anywhere in IR optimizations, and in the backend the intrinsic is ReadNone anyhow (the IR setting gets overridden). If we run into any problems with this in the future, we may consider handling the lowering of this intrinsic in TargetLowering::LowerINTRINSIC_W_CHAIN rather than in TargetLowering::LowerINTRINSIC_WO_CHAIN. BUG=None R=mseaborn@chromium.org Review URL: https://codereview.chromium.org/14643019
2013-05-14Fix some build warnings in Nacl-specific codeEli Bendersky
BUG=None R=dschuff@chromium.org Review URL: https://codereview.chromium.org/14840018
2013-05-14Merging r181450:Bill Wendling
------------------------------------------------------------------------ r181450 | uweigand | 2013-05-08 10:50:07 -0700 (Wed, 08 May 2013) | 16 lines [PowerPC] Fix regression in generating @ha/@l relocs The patch I committed as revision 167864 introduced a regression that causes LLVM to no longer generate appropriate relocs for @ha/@l symbol references (but fail an assertion instead). This is fixed here by re-enabling support for the VK_PPC_GAS_HA16/ VK_PPC_GAS_LO16 variant kinds (and their Darwin variants) in PPCELFObjectWriter.cpp. Tested by running projects/test-suite in -m32 mode with the integrated assembler forced on. A standalone test case will be committed shortly as well. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-14Merging r181800:Bill Wendling
------------------------------------------------------------------------ r181800 | wschmidt | 2013-05-14 09:08:32 -0700 (Tue, 14 May 2013) | 15 lines PPC32: Fix stack collision between FP and CR save areas. The changes to CR spill handling missed a case for 32-bit PowerPC. The code in PPCFrameLowering::processFunctionBeforeFrameFinalized() checks whether CR spill has occurred using a flag in the function info. This flag is only set by storeRegToStackSlot and loadRegFromStackSlot. spillCalleeSavedRegisters does not call storeRegToStackSlot, but instead produces MI directly. Thus we don't see the CR is spilled when assigning frame offsets, and the CR spill ends up colliding with some other location (generally the FP slot). This patch sets the flag in spillCalleeSavedRegisters for PPC32 so that the CR spill is properly detected and gets its own slot in the stack frame. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181815 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-14Merging r181586:Bill Wendling
------------------------------------------------------------------------ r181586 | d0k | 2013-05-10 02:16:52 -0700 (Fri, 10 May 2013) | 3 lines InstCombine: Verify the type before transforming uitofp into select. PR15952. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-14Adding a pass - RewritePNaClLibraryCalls, that replaces known library calls ↵Eli Bendersky
with stable bitcode intrinsics. Starting with setjmp and longjmp. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3429 R=jvoung@chromium.org, mseaborn@chromium.org Review URL: https://codereview.chromium.org/14617017
2013-05-13Start to disallow llvm.frameaddress and llvm.returnaddress in ABI checker.Jan Voung
They do not seem to be widely used by user code. * The boehm garbage collector library does reference __builtin_return_address under an ifdef, but it does not appear to be compiled in. * Mesa-7.6 uses __builtin_frame_address for u_debug_stack.c, but that also does not appear to be part of the built libraries. They expose stack/code addresses (at least the lower 32-bits of the address). As part of https://codereview.chromium.org/14619022/, we stopped considering the scons and gcc torture tests that use these intrinsics as meeting the stable ABI. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3378 R=dschuff@chromium.org Review URL: https://codereview.chromium.org/14657017
2013-05-10PNaCl ABI: Promote illegal integer typesDerek Schuff
This pass (mostly) legalizes integer types by promoting them. It has some limitations (e.g. it can't change function types) but it is more than sufficient for what clang and SROA generate. A more significant limitation of promotion is that packed bitfields of size > 64 bits are still not handled. There are none in our tests (other than callingconv_case_by_case which doesn't require a stable pexe) but we will want to either handle them by correctly expanding them, or find a better way to error out. BUG= https://code.google.com/p/nativeclient/issues/detail?id=3360 R=eliben@chromium.org, jvoung@chromium.org Review URL: https://codereview.chromium.org/14569012
2013-05-10LLVM: Add ELF Note section to NaCl object files identifying them as such to goldDerek Schuff
This is needed to switch the native linker to one based on upstream binutils 2.23 R=mseaborn@chromium.org BUG= https://code.google.com/p/nativeclient/issues/detail?id=2971 also related to bug https://code.google.com/p/nativeclient/issues/detail?id=3424 Review URL: https://codereview.chromium.org/15067009
2013-05-10Merging r181397:Bill Wendling
------------------------------------------------------------------------ r181397 | nicholas | 2013-05-08 02:00:10 -0700 (Wed, 08 May 2013) | 3 lines Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst by switching to a ValueMap. Patch by Andrea DiBiagio! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09Support @llvm.nacl.{set|long}jmp intrinsics by translating them to library callsEli Bendersky
This is similar to the way @llvm.{set|long}jmp are handled. The previously defined nacl-specific intrinsics are no longer used and are overridden. For the library call, call setjmp/longjmp without a preceding underscore as these symbols exist in our runtime support code (pnacl/support/setjmp_XXX.S) BUG=https://code.google.com/p/nativeclient/issues/detail?id=3429 R=mseaborn@chromium.org Review URL: https://codereview.chromium.org/14715018
2013-05-09Move llvm.eh.frame.cfa to the blacklist of intrinsics.Jan Voung
Tests that use them now skip ABI verification. Known tests that use this are the scons tests: - the barebones_stack_alignment16 test and - the EH ones under tests/toolchain/ Also list other eh_* in the blacklist more explicitly (they were already caught by the default case). BUG=https://code.google.com/p/nativeclient/issues/detail?id=3378 TEST= scons, gcc torture, llvm R=dschuff@chromium.org Review URL: https://codereview.chromium.org/14998008
2013-05-09PNaCl: Add NoAlias attributes in ExpandByVal and ExpandVarArgs passesMark Seaborn
This could help prevent these expansion passes from inhibiting optimisations than run after the expansion. e.g. It gives the optimiser more freedom to move around reads from the varargs buffer because they will not alias writes to other locations. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3400 TEST=PNaCl toolchain trybots + GCC torture tests + LLVM test suite + Spec2k Review URL: https://codereview.chromium.org/14060026
2013-05-09Merging r181423:Bill Wendling
------------------------------------------------------------------------ r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines PPCInstrInfo::optimizeCompareInstr should not optimize FP compares The floating-point record forms on PPC don't set the condition register bits based on a comparison with zero (like the integer record forms do), but rather based on the exception status bits. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181507 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Add dependency on NaClTransforms to lib/Target/ARM.Jan Voung
It depends on NaClTransforms for the denominator zero checks transform. BUG=https://code.google.com/p/nativeclient/issues/detail?id=2833 (fix build) R=dschuff@chromium.org Review URL: https://codereview.chromium.org/15067004
2013-05-08Merging r181286:Bill Wendling
------------------------------------------------------------------------ r181286 | arnolds | 2013-05-06 21:37:05 -0700 (Mon, 06 May 2013) | 7 lines LoopVectorize: getConsecutiveVector must respect signed arithmetic We were passing an i32 to ConstantInt::get where an i64 was needed and we must also pass the sign if we pass negatives numbers. The start index passed to getConsecutiveVector must also be signed. Should fix PR15882. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Put llvm.powi in the dev list of intrinsics.Jan Voung
This is used by the LLVM translator as part of: lib/Analysis/ConstantFolding.cpp (it tries to do constant folding for pow calls...) Also, tweak comment about llvm.pow vs llvm.powi. It looks like powi is the imprecise one, not pow. BUG=unblock DEPs roll, broken self-build. BUG=http://code.google.com/p/nativeclient/issues/detail?id=3378 R=eliben@chromium.org Review URL: https://codereview.chromium.org/14631013
2013-05-08Insert denominator zero checks for NaClDavid Sehr
This IR pass for ARM inserts a comparison and a branch to trap if the denominator of a DIV or REM instruction is zero. This makes ARM fault identically to x86 in this case. BUG= https://code.google.com/p/nativeclient/issues/detail?id=2833 R=eliben@chromium.org Review URL: https://codereview.chromium.org/14607004
2013-05-08Merge of r181312Richard Sandiford
[SystemZ] Fix InitMCCodeGenInfo call createSystemZMCCodeGenInfo was not passing the optimization level to InitMCCodeGenInfo(), so -O0 would be ignored. Fixes DebugInfo/namespace.ll after the changes in r181271. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181419 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merging r181313:Bill Wendling
------------------------------------------------------------------------ r181313 | mkuper | 2013-05-07 07:05:33 -0700 (Tue, 07 May 2013) | 1 line Re-enable AVX detection on x64 platforms. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merging r181296:Bill Wendling
------------------------------------------------------------------------ r181296 | timurrrr | 2013-05-07 00:47:47 -0700 (Tue, 07 May 2013) | 1 line Fix the VS2010 build broken by r181271 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181379 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-07Start a whitelist of intrinsics for the PNaCl ABI checker.Jan Voung
This list is currently too small to support our tests (scons, gcc, llvm). To prevent the tests from breaking, there is a -pnaclabi-allow-intrinsics flag which defaults to true. To turn on the checking for real, set -pnaclabi-allow-intrinsics=0. We will avoid actually using the -pnaclabi-allow-intrinsics flags in tests, and try to just stick with the -pnacl-disable-abi-check flag. Remove this flag soon. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3378 R=eliben@chromium.org Review URL: https://codereview.chromium.org/14670017
2013-05-06DebugInfo: Support imported modules in lexical blocksDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181269 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemaskTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add intrinsic for texture image loadingTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add pattern for uint_to_fpTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181266 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add patterns for integer maxima / minimaTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add pattern for AMDGPU.trunc intrinsicTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181263 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181255 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Implemented public interface for modifying registered (not positional or ↵Andrew Trick
sink options) command line options at runtime. Patch by Dan Liew! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Support command line option categories.Andrew Trick
Patch by Dan Liew! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181253 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Cleanup of the HexagonTargetMachine setup.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181250 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06InstCombine: (X ^ signbit) + C -> X + (signbit ^ C)David Majnemer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Hoist boundary condition out of loop header.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181248 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Untabify.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181247 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Make references to HexagonTargetMachine "const".Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181233 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Rotate multi-exit loops even if the latch was simplified.Andrew Trick
Test case by Michele Scandale! Fixes PR10293: Load not hoisted out of loop with multiple exits. There are few regressions with this patch, now tracked by rdar:13817079, and a roughly equal number of improvements. The regressions are almost certainly back luck because LoopRotate has very little idea of whether rotation is profitable. Doing better requires a more comprehensive solution. This checkin is a quick fix that lacks generality (PR10293 has a counter-example). But it trivially fixes the case in PR10293 without interfering with other cases, and it does satify the criteria that LoopRotate is a loop canonicalization pass that should avoid heuristics and special cases. I can think of two approaches that would probably be better in the long run. Ultimately they may both make sense. (1) LoopRotate should check that the current header would make a good loop guard, and that the loop does not already has a sufficient guard. The artifical SimplifiedLoopLatch check would be unnecessary, and the design would be more general and canonical. Two difficulties: - We need a strong guarantee that we won't endlessly rotate, so the analysis would need to be precise in order to avoid the SimplifiedLoopLatch precondition. - Analysis like this are usually based on SCEV, which we don't want to rely on. (2) Rotate on-demand in late loop passes. This could even be done by shoving the loop back on the queue after the optimization that needs it. This could work well when we find LICM opportunities in multi-branch loops. This requires some work, and it doesn't really solve the problem of SCEV wanting a loop guard before the analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181230 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Remove dead code from the CodeEmitter v2Tom Stellard
v2: - Replace switch statement with TSFlags query Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Emit config values in register / value pairsTom Stellard
Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181228 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Remove unnecessary instance variable and rework logic accordingly.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Grammar.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Stop emitting the instruction type byte before each instructionTom Stellard
Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181225 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Don't emit .dwo sections unless they exist.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Emit ISA for CALL_FS_* instructionsTom Stellard
Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Update non-pic DWARF encodingsUlrich Weigand
As pointed out by Rafael Espindola, we should match the DWARF encodings produced by GCC in both pic and non-pic modes. This was not the case for the non-pic case. This patch changes all DWARF encodings to DW_EH_PE_absptr for the non-pic case, just like GCC does. The test case is updated to check for both variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06PowerPC: Fix unimplemented relocation on ppc64Adhemerval Zanella
This patch handles the R_PPC64_REL64 relocation type for powerpc64 for mcjit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Provide InstCombines for the following 3 cases:Jean-Luc Duprat
A * (1 - (uitofp i1 C)) -> select C, 0, A B * (uitofp i1 C) -> select C, B, 0 select C, 0, A + select C, B, 0 -> select C, B, A These come up in code that has been hand-optimized from a select to a linear blend, on platforms where that may have mattered. We want to undo such changes with the following transform: A*(1 - uitofp i1 C) + B*(uitofp i1 C) -> select C, A, B git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Add back endUlrich Weigand
This adds the actual lib/Target/SystemZ target files necessary to implement the SystemZ target. Note that at this point, the target cannot yet be built since the configure bits are missing. Those will be provided shortly by a follow-on patch. This version of the patch incorporates feedback from reviews by Chris Lattner and Anton Korobeynikov. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181203 91177308-0d34-0410-b5e6-96231b3b80d8
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