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2013-04-20SimplifyCFG: If convert single conditional storesArnold Schwaighofer
This transformation will transform a conditional store with a preceeding uncondtional store to the same location: a[i] = may-alias with a[i] load if (cond) a[i] = Y into an unconditional store. a[i] = X may-alias with a[i] load tmp = cond ? Y : X; a[i] = tmp We assume that on average the cost of a mispredicted branch is going to be higher than the cost of a second store to the same location, and that the secondary benefits of creating a bigger basic block for other optimizations to work on outway the potential case were the branch would be correctly predicted and the cost of the executing the second store would be noticably reflected in performance. hmmer's execution time improves by 30% on an imac12,2 on ref data sets. With this change we are on par with gcc's performance (gcc also performs this transformation). There was a 1.2 % performance improvement on a ARM swift chip. Other tests in the test-suite+external seem to be mostly uninfluenced in my experiments: This optimization was triggered on 41 tests such that the executable was different before/after the patch. Only 1 out of the 40 tests (dealII) was reproducable below 100% (by about .4%). Given that hmmer benefits so much I believe this to be a fair trade off. I am going to watch performance numbers across the builtbots and will revert this if anything unexpected comes up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20ARM: don't add FrameIndex offset for LDMIA (has no immediate)Tim Northover
Previously, when spilling 64-bit paired registers, an LDMIA with both a FrameIndex and an offset was produced. This kind of instruction shouldn't exist, and the extra operand was being confused with the predicate, causing aborts later on. This removes the invalid 0-offset from the instruction being produced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20AArch64: remove useless commentTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Move 'kw_align' case to proper section, reorganize function attribute ↵Stephen Lin
keyword case statements to be consistent with r179119 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Remove unused ShouldFoldAtomicFences flag.Tim Northover
I think it's almost impossible to fold atomic fences profitably under LLVM/C++11 semantics. As a result, this is now unused and just cluttering up the target interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20VecUtils: Clean up uses of dyn_cast.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20SLPVectorizer: Strength reduce SmallVectors to ArrayRefs.Benjamin Kramer
Avoids a couple of copies and allows more flexibility in the clients. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20SLPVectorizer: Reduce the compile time by eliminating the search for some of ↵Nadav Rotem
the more expensive patterns. After this change will only check basic arithmetic trees that start at cmpinstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20refactor tryToVectorizePair to a new method that supports vectorization of ↵Nadav Rotem
lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Fix an unused variable warning.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179931 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20SLPVectorizer: Improve the cost model for loop invariant broadcast values.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179930 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Report the number of stores that were found in the debug message.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Fix the header comment.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Use 64bit arithmetic for calculating distance between pointers.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Move PPC getSwappedPredicate for reuseHal Finkel
The getSwappedPredicate function can be used in other places (such as in improvements to the PPCCTRLoops pass). Instead of trapping it as a static function in PPCInstrInfo, move it into PPCPredicates with other predicate-related things. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Add CodeGen support for functions that always return arguments via a new ↵Stephen Lin
parameter attribute 'returned', which is taken advantage of in target-independent tail call opportunity detection and in ARM call lowering (when placed on an integral first parameter). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Allow tail call opportunity detection through nested and/or multiple ↵Stephen Lin
iterations of extractelement/insertelement indirection git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Test commitStephen Lin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Simplify the code in FastISel::tryToFoldLoad, add an assertion and fix a ↵Eli Bendersky
comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[mips] Instruction selection patterns for DSP-ASE vector shifts.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179906 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19MergeFunc: Make pointer and integer types generate the same hash.Benjamin Kramer
The logic that actually compares the types considers pointers and integers the same if they are of the same size. This created a strange mismatch between hash and reality and made the test case for this fail on some platforms (yay, test cases). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Move TryToFoldFastISelLoad to FastISel, where it belongs. In general, I'mEli Bendersky
trying to move as much FastISel logic as possible out of the main path in SelectionDAGISel - intermixing them just adds confusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19ArrayRefize getMachineNode(). No functionality change.Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Fix PPC optimizeCompareInstr swapped-sub argument handlingHal Finkel
When matching a compare with a subtract where the arguments of the compare are swapped w.r.t. the arguments of the subtract, we need to negate the predicates (or CR bit indices) of the users. This, however, is not the same as inverting the predicate (negating LT -> GT, but inverting LT -> GE, for example). The ARM backend seems to do this correctly, but when I adapted the code for the PPC backend, I introduced an error in this logic. Comparison optimization is now enabled again by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179899 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Add an MRI::verifyUseLists() function.Jakob Stoklund Olesen
This checks the sanity of the register use lists in the MI intermediate representation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179895 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Use dbgs() consistently for -debug printoutsEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Do not mangle in MS-way the globals with magic \001 in the name.Anton Korobeynikov
Based on the patch by David Nadlinger! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179889 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19LoopVectorizer: Use matcher from PatternMatch.h for the min/max patternsArnold Schwaighofer
Also make some static function class functions to avoid having to mention the class namespace for enums all the time. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-1980-col fixup.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Rename ClassType to the more accurate UnderlyingType and document its purpose.Adrian Prantl
rdar://problem/13463793 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[ms-inline asm] Make code layout more canonical with iniline asm handled last.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[mips] First patch which adds support for micromips.Akira Hatanaka
This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179873 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[mips] Fix InstAlias of XOR and OR macros. Set EmitAlias flag and changeAkira Hatanaka
operand type to uimm16. Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[ms-inline asm] Refactor the parsing of identifiers. No functional changeChad Rosier
indended. Part of rdar://13663589 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[ms-inline asm] Remove these asserts. C++ variables that use namespaceChad Rosier
qualifiers don't necessarily begin with an identifier (e.g., ::foo::bar). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179867 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[ms-inline asm] Move this variable into the scope in which it is used.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[ms-inline asm] Make this a hard error.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19ConstantFolding: ComputeMaskedBits wants the scalar size for vectors.Benjamin Kramer
Fixes PR15791. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19[ms-inline asm] Cleanup the dot operator implementation.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179856 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover
Patch from Mihail Popa git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179854 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19refactor the struct byte swapping to a helper function.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Attributes: Don't print trailing whitespace on the function attribute comment.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179849 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Don't read one command past the end.Rafael Espindola
Thanks to Evgeniy Stepanov for reporting this. It might be a good idea to add a command iterator abstraction to MachO.h, but this fixes the bug for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179848 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Revert "PR14606: debug info imported_module support"Eric Christopher
This reverts commit r179836 as it seems to have caused test failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19PR14606: debug info imported_module supportDavid Blaikie
Adding another CU-wide list, in this case of imported_modules (since they should be relatively rare, it seemed better to add a list where each element had a "context" value, rather than add a (usually empty) list to every scope). This takes care of DW_TAG_imported_module, but to fully address PR14606 we'll need to expand this to cover DW_TAG_imported_declaration too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179836 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Use 'array_lengthof' as possible to avoid magic numbersMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19R600: Add pattern for the BFI_INT instructionTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179830 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19R600/SI: Use InstFlag for VOP3 modifier operandsTom Stellard
InstFlag has a default value of 0 and will simplify the VOP3 patterns. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179829 91177308-0d34-0410-b5e6-96231b3b80d8
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