| Age | Commit message (Expand) | Author |
|---|
| 2012-03-20 | Zap some dead code pointed out by Chandler. | Eric Christopher |
| 2012-03-20 | RuntimeDyldMachO has the ability to keep track of | Sean Callanan |
| 2012-03-20 | [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu to | Chad Rosier |
| 2012-03-20 | Assembler should accept redefinitions of unused variable symbols. | Jim Grosbach |
| 2012-03-20 | Tidy up. | Jim Grosbach |
| 2012-03-20 | Change conditional instructions definitions, e.g. ANDCC, ARMPseudoExpand and ... | Evan Cheng |
| 2012-03-20 | LoopSimplify bug fix. Handle indirect loop back edges. | Andrew Trick |
| 2012-03-20 | whitespace | Andrew Trick |
| 2012-03-20 | LSR: teach isSimplifiedLoopNest to handle PHI IVUsers. | Andrew Trick |
| 2012-03-20 | LSR: fix IVUsers isSimplifiedLoopNest to perform a full domtree walk | Andrew Trick |
| 2012-03-20 | remove unused variable | Matt Beaumont-Gay |
| 2012-03-20 | [avx] Add the AddedComplexity to the VINSERTI128 avx2 patterns to give | Chad Rosier |
| 2012-03-20 | Require a base pointer for stack realignment when SP may vary dynamically. | Bob Wilson |
| 2012-03-20 | Remove some redundant checks. | Bob Wilson |
| 2012-03-20 | Whitespace. | Chad Rosier |
| 2012-03-20 | [avx] Move the vextractf128 patterns closer to the vextractf128 def. Remove | Chad Rosier |
| 2012-03-20 | Fix assembling ARM vst2 instructions with double-spaced registers. | Kevin Enderby |
| 2012-03-20 | ARM non-scattered MachO relocations for movw/movt. | Jim Grosbach |
| 2012-03-20 | [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads. | Chad Rosier |
| 2012-03-20 | The ARM instructions that have an unpredictable behavior when the pc register... | Silviu Baranga |
| 2012-03-20 | Test Commit - add a newline | Richard Barton |
| 2012-03-20 | It's possible to have a constant expression who's size is quite big (e.g., | Bill Wendling |
| 2012-03-20 | Remove code that prevented lowering shuffles if they are used by load and the... | Craig Topper |
| 2012-03-20 | Factor out target shuffle mask decoding from getShuffleScalarElt and use a Sm... | Craig Topper |
| 2012-03-20 | When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add user... | Craig Topper |
| 2012-03-20 | Do everything up to generating code to try to get a register for | Eric Christopher |
| 2012-03-20 | Untabify. | Eric Christopher |
| 2012-03-20 | Add another debugging statement here. | Eric Christopher |
| 2012-03-20 | Use lookUpRegForValue here instead of duplicating the code. | Eric Christopher |
| 2012-03-19 | f16 FDIV can now be legalized by promoting to f32 | Pete Cooper |
| 2012-03-19 | fix a build failure with libc++ | Chris Lattner |
| 2012-03-19 | ARM branch relaxation for unconditional t1 branches. | Jim Grosbach |
| 2012-03-19 | ARM assembly, accept optional '#' on lane index number. | Jim Grosbach |
| 2012-03-19 | [Object/COFF]: Expose getSectionContents. | Michael J. Spencer |
| 2012-03-19 | [Object/COFF]: Expose getSectionName. | Michael J. Spencer |
| 2012-03-19 | Perform mul combine when multiplying wiht negative constants. | Anton Korobeynikov |
| 2012-03-19 | Add an option to the MI scheduler to cut off scheduling after a fixed number of | Lang Hames |
| 2012-03-19 | [asan] don't emit __asan_mapping_offset/__asan_mapping_scale by default -- th... | Kostya Serebryany |
| 2012-03-19 | Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala. | Duncan Sands |
| 2012-03-19 | This patch adds X86 instruction itineraries for non-pseudo opcodes in | Preston Gurd |
| 2012-03-19 | Add a note for -ffast-math optimization of vector norm. | Benjamin Kramer |
| 2012-03-18 | Factor out the multiply analysis code in ComputeMaskedBits and apply it to the | Nick Lewycky |
| 2012-03-18 | isCommutedMOVLMask should only look at 128-bit vectors to match isMOVLMask. | Craig Topper |
| 2012-03-17 | CriticalAntiDepBreaker: Replace a SmallSet of regs with a much denser BitVector. | Benjamin Kramer |
| 2012-03-17 | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper |
| 2012-03-17 | MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty. | Benjamin Kramer |
| 2012-03-17 | Fix some copy and paste remnants of Cell and SPU in Hexagon files. | Craig Topper |
| 2012-03-17 | Fix typo in file header. | Craig Topper |
| 2012-03-17 | Pass TargetOptions to HexagonTargetMachine constructor by reference to match ... | Craig Topper |
| 2012-03-17 | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper |
