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2013-04-13Fix a scalability issue with complex ConstantExprs.Benjamin Kramer
This is basically the same fix in three different places. We use a set to avoid walking the whole tree of a big ConstantExprs multiple times. For example: (select cmp, (add big_expr 1), (add big_expr 2)) We don't want to visit big_expr twice here, it may consist of thousands of nodes. The testcase exercises this by creating an insanely large ConstantExprs out of a loop. It's questionable if the optimizer should ever create those, but this can be triggered with real C code. Fixes PR15714. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179458 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Spill and restore PPC CR registers using the FP when we have oneHal Finkel
For functions that need to spill CRs, and have dynamic stack allocations, the value of the SP during the restore is not what it was during the save, and so we need to use the FP in these cases (as for all of the other spills and restores, but the CR restore has a special code path because its reserved slot, like the link register, is specified directly relative to the adjusted SP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179457 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13MI-Sched: DEBUG formatting.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179452 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13MI-Sched cleanup. If an instruction has no valid sched class, do not attempt ↵Andrew Trick
to check for a variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179451 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13X86 machine model: reduce SandyBridge and Haswell ILPWindow.Andrew Trick
The initial values were arbitrary. I want them to be more conservative. This represents the number of latency cycles hidden by OOO execution. In practice, I think it should be within a small factor of the complex floating point operation latency so the scheduler can make some attempt to hide latency even for smallish blocks. These are by no means the best values, just a starting point for tuning heuristics. Some benchmarks such as TSVC run faster with this lower value for SandyBridge. I haven't run anything on Haswell, but it's shouldn't be 2x SB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179450 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13MI-Sched: schedule physreg copies.Andrew Trick
The register allocator expects minimal physreg live ranges. Schedule physreg copies accordingly. This is slightly tricky when they occur in the middle of the scheduling region. For now, this is handled by rescheduling the copy when its associated instruction is scheduled. Eventually we may instead bundle them, but only if we can preserve the bundles as parallel copies during regalloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179449 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Catch another case where SD fails to propagate node order.Andrew Trick
I need to handle this for the test case in my following scheduler commit. Work is already under way to redesign the mechanism for node order propagation because this case by case approach is unmaintainable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179448 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13[mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN andAkira Hatanaka
lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering. No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Finish templating MachObjectFile over endianness.Rafael Espindola
We are now able to handle big endian macho files in llvm-readobject. Thanks to David Fang for providing the object files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179440 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13[mips] Reapply r179420 and r179421.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179434 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13[mips] Override TargetLoweringBase::isShuffleMaskLegal.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179433 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Simplify the logic by using parsePrimaryExpr. No functionalChad Rosier
change intended. Test case previously added in r178568. Part of rdar://13611297 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Revert r179420 and r179421.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[mips] Instruction selection patterns for carry-setting and using addAkira Hatanaka
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179420 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Revert r179409 because it caused some warnings and some of the build bots fail.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179418 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12InstCombine: Check the operand types before merging fcmp ord & fcmp ord.Benjamin Kramer
Fixes PR15737. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12SLPVectorizer: add support for vectorization of diamond shaped trees. We now ↵Nadav Rotem
perform a preliminary traversal of the graph to collect values with multiple users and check where the users came from. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179414 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12CostModel: increase the default cost of supported floating point operations ↵Nadav Rotem
from 1 to two. Fixed a few tests that changes because now the cost of one insert + a vector operation on two doubles is lower than two scalar operations on doubles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add debug prints.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add support for additional vector instructions in the interpreter.Nadav Rotem
patch by Veselov, Yuri <Yuri.Veselov@intel.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179409 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Move this logic into a static function as it's only applicableChad Rosier
when parsing MS-style inline assembly. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Have the StripMetadata pass also strip unsupported named metadata.Jan Voung
Previously it was just instruction attachments. Depends on a driver change to actually work: https://codereview.chromium.org/14072004/ BUG= http://code.google.com/p/nativeclient/issues/detail?id=3348 Review URL: https://codereview.chromium.org/14022009
2013-04-12PNaCl: extend GlobalCleanup to null-out extern_weak function references, and ↵Derek Schuff
extend the ABI checker to verify. Also promote weak symbols to internal ones, which was required because the scons barebones tests define weak versions of memcpy/memset BUG= https://code.google.com/p/nativeclient/issues/detail?id=3339 TEST= llvm-regression (globalcleanup.ll), scons barebones tests Review URL: https://codereview.chromium.org/13989005
2013-04-12PNaCl ABI checker: Disallow ConstantExprs inside functionsMark Seaborn
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3337 TEST=test/NaCl/PNaClABI/*.ll Review URL: https://codereview.chromium.org/13932023
2013-04-12PNaCl ABI checker: Disallow va_arg, varargs functions and varargs callsMark Seaborn
This doesn't disallow the va_start/va_end/va_copy intrinsics yet; these will get disallowed later when we add whitelisting of intrinsics to the PNaCl ABI checker. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3338 TEST=test/NaCl/PNaClABI/*.ll Review URL: https://codereview.chromium.org/13884013
2013-04-12[ms-inline asm] Address the FIXME for ImmDisp before brackets. ThisChad Rosier
is a follow on to r179393 and r179399. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12PNaCl ABI checker: Disallow invoke+landingpad instructionsMark Seaborn
The first release of the stable PNaCl ABI won't support zero-cost C++ exception handling. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3377 TEST=toolchain trybots + gcc torture tests + Spec2k + LLVM regression tests Review URL: https://codereview.chromium.org/14044006
2013-04-12[ms-inline asm] Have the [ Symbol ] case fall into the more general logic. ThisChad Rosier
is a follow on to r179393. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12ARM: Correct printing of pre-indexed operands.Quentin Colombet
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes. The MC disassembler was not obeying this when the offset is 0. It was producing instructions like: str r0, [r1]!. Correct syntax is: str r0, [r1, #0]!. This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used. Patch by Mihail Popa <Mihail.Popa@arm.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Add support for operands that include both a symbol and anChad Rosier
immediate displacement. Specifically, add support for generating the proper IR. We've been able to parse this for some time now. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12PPC: Remove (broken) nested implicit definition listsHal Finkel
TableGen will not combine nested list 'let' bindings into a single list, and instead uses only the inner scope. As a result, several instruction definitions were missing implicit register defs that were in outer scopes. This de-nests these scopes and makes all instructions have only one let binding which sets implicit register definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add a comment about the PPC Interpretation64Bit bitHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Hexagon: Set isPredicatedNew flag on predicate new instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179388 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Hexagon: Set isPredicatedFlase flag for all the instructions with negated ↵Jyotsna Verma
predication. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Simplify (A & ~B) in icmp if A is a power of 2David Majnemer
The transform will execute like so: (A & ~B) == 0 --> (A & B) != 0 (A & ~B) != 0 --> (A & B) == 0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Add the implementation for the AOK_Delete kind, which was addedChad Rosier
in r179325. Test case coming shortly on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179383 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12LoopVectorizer: integer division is not a reduction operationArnold Schwaighofer
Don't classify idiv/udiv as a reduction operation. Integer division is lossy. For example : (1 / 2) * 4 != 4/2. Example: int a[] = { 2, 5, 2, 2} int x = 80; for() x /= a[i]; Scalar: x /= 2 // = 40 x /= 5 // = 8 x /= 2 // = 4 x /= 2 // = 2 Vectorized: <80, 1> / <2,5> //= <40,0> <40, 0> / <2,2> //= <20,0> 20*0 = 0 radar://13640654 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179381 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Revert broken pieces of r179373.Benjamin Kramer
You can't copy an OwningPtr, and move semantics aren't available in C++98. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Replace uses of the deprecated std::auto_ptr with OwningPtr.Andy Gibbs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179373 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Fix a disconcerting bug in Value::isUsedInBasicBlock, which gave wrong ↵Benjamin Kramer
answers for blocks larger than 3 instrs. Also add a unit test. PR15727. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add PPC instruction record forms and associated query functionsHal Finkel
This is prep. work for the implementation of optimizeCompare. Many PPC instructions have 'record' forms (in almost all cases, this means that the RC bit is set) that cause the result of the instruction to be compared with zero, and the result of that comparison saved in a predefined condition register. In order to add the record forms of the instructions without too much copy-and-paste, the relevant functions have been refactored into multiclasses which define both the record and normal forms. Also, two TableGen-generated mapping functions have been added which allow querying the instruction code for the record form given the normal form (and vice versa). No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Don't disable block layout when forcing block alignment.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add a flag to align all basic blocks in the function.Nadav Rotem
When debugging performance regressions we often ask ourselves if the regression that we see is due to poor isel/sched/ra or due to some micro-architetural problem. When comparing two code sequences one good way to rule out front-end bottlenecks (and other the issues) is to force code alignment. This pass adds a flag that forces the alignment of all of the basic blocks in the program. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add 179294 back, but don't use bit fields so that it works on big endian hosts.Rafael Espindola
Original message: Print more information about relocations. With this patch llvm-readobj now prints if a relocation is pcrel, its length, if it is extern and if it is scattered. It also refactors the code a bit to use bit fields instead of shifts and masks all over the place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179345 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add support for using the LENGTH, TYPE, and SIZE operators withChad Rosier
variables that use namespace alias qualifiers. Test case coming on clang side shortly. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add support for using offsetof operator with variables that useChad Rosier
namespace alias qualifiers. Test case coming on clang side shortly. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Aliasing rules for struct-path aware TBAA.Manman Ren
Added PathAliases to check if two struct-path tags can alias. Added command line option -struct-path-tbaa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179337 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Pass a StringRef reference to ParseIntelVarWithQualifier so weChad Rosier
can build up the identifier string. No test case as support for looking up these type of identifiers hasn't been implemented on the clang side. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Remove brackets from around a symbol reference in the targetChad Rosier
specific logic. This makes the code much less fragile. Test case coming on the clang side in a moment. rdar://13634327 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179323 91177308-0d34-0410-b5e6-96231b3b80d8
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