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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130431 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129759 91177308-0d34-0410-b5e6-96231b3b80d8
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Luis Felipe Strano Moraes!
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instruction around, reducing work.
Greatly simplify handling of debug instructions. There is no need to
build up a vector of them and then move them into the one predecessor
if we're processing a block. Instead just rescan the block and *copy*
them into the pred. If a block gets merged into multiple preds, this
will retain more debug info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129319 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129271 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129114 91177308-0d34-0410-b5e6-96231b3b80d8
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match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129078 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129041 91177308-0d34-0410-b5e6-96231b3b80d8
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values also.
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llvm-commits. (Not sure why it only breaks on Windows; maybe it has
something to do with the iterator representation...)
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after the given instruction; make sure to handle that case correctly.
(It's difficult to trigger; the included testcase involves a dead
block, but I don't think that's a requirement.)
While I'm here, get rid of the unnecessary warning about
SimplifyInstructionsInBlock, since it should work correctly as far as I know.
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PHINode::Create() giving the (known or expected) number of operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128535 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128030 91177308-0d34-0410-b5e6-96231b3b80d8
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LoadInst should also get a corresponding llvm.dbg.value intrinsic.
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This is done by lowering dbg.declare intrinsic into dbg.value intrinsic.
Radar 9143931.
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of pointers in an std::map.
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reachable uses, but there still might be uses in dead blocks. Use the
standard solution of replacing all the uses with undef. This is
a rare case because it's very sensitive to phase ordering in SimplifyCFG.
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Avoid colliding with the sentinels, hopefully unbreaking
llvm-gcc-x86_64-linux-selfhost.
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branch.
Based on a patch by Alistair Lynn.
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Yes, there are other types than i8* and GEPs on them can produce an add+multiply.
We don't consider that cheap enough to be speculatively executed.
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unconditionally.
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itself without going via a phi node then we could return false here in
spite of making a change. Also, tweak the comment because this method
can (and always could) return true without deleting the original phi node.
For example, if the phi node was used by a read-only invoke instruction
which is used by another phi node phi2 which is only used by and only uses
the invoke, then phi2 would be deleted but not the invoke instruction and
not the original phi node.
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should be that if the phi is used by a side-effect free instruction with
no uses then the phi and the instruction now get zapped (checked by the
unittest).
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test for that. With this change, test/CodeGen/X86/codegen-dce.ll no longer finds
any instructions to DCE, so delete the test.
Also renamed J and JP to I and IP in RecursivelyDeleteDeadPHINode.
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by Andrew Clinton!
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This is part of a futile attempt to not "break" bizzaro
code like this:
l1:
printf("l1: %p\n", &&l1);
++x;
if( x < 3 ) goto l1;
Previously we'd fold &&l1 to 1, which is fine per our semantics
but not helpful to the user.
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switch. If we used only one icmp, don't turn it into a switch.
Also prevent the switch-to-icmp transform from creating identity adds, noticed by Marius Wachtler.
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are not sorted into sub+icmp.
This transforms another 1000 switches in gcc.c.
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This makes the job of the later optzn passes easier, allowing the vast amount of
icmp transforms to chew on it.
We transform 840 switches in gcc.c, leading to a 16k byte shrink of the resulting
binary on i386-linux.
The testcase from README.txt now compiles into
decl %edi
cmpl $3, %edi
sbbl %eax, %eax
andl $1, %eax
ret
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unconditional predecessor to enable TCE on demand.
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branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
allocation is done.
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code.
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on test-suite + SPEC2000 & SPEC2006.
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