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path: root/lib/Transforms/Scalar/ScalarReplAggregates.cpp
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2011-06-18Fix an invalid bitcast crash that occurs when doing a partial memset of a vectorCameron Zwarich
alloca. Fixes part of <rdar://problem/9580800>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18Remove a pointless assignment. Nothing checks the value of VectorTy anymore nowCameron Zwarich
unless ScalarKind is Vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Be more obvious about what is being tested.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Fix grammar.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Rename MergeInType to MergeInTypeForLoadOrStore.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132940 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Remove the HadAVector instance variable and replace it with a use of ScalarKind.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Remove a vacuous check.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Have SRoA explicitly track the kind of scalar it is promoting. This is prettyCameron Zwarich
spartan right now, but I plan to encode more information in this enum to improve the correctness and reliability of SRoA. At least this first pass makes it possible to make VectorTy an actual VectorType. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Remove an argument that is always true.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09Remove a vacuous condition.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09Fix PR10104 by adding a bounds check on a vector element access check. It wasCameron Zwarich
assuming that all offsets are legal vector accesses, and thus trying to access the float member of { <2 x float>, float } as the 3rd element of the first member. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-08Fix an assymmetry between ConvertScalar_ExtractValue and ↵Cameron Zwarich
ConvertScalar_InsertValue. The former was using the size of the entire alloca, whereas the latter was correctly using the allocated size of the immediate type being converted (which may differ from the size of the alloca). This fixes PR10082. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03Use IRBuilder, preserve line numbers.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24Clean up the lazy initialization of DIBuilder a bit.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24Make LoadAndStorePromoter preserve debug info and create llvm.dbg.values whenCameron Zwarich
promoting allocas to SSA variables. Fixes <rdar://problem/9479036>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06Fix PR9820: a read-only call differs from a load in that a load doesn'tDuncan Sands
return the pointer being dereferenced, it returns the pointee, but a call might return the pointer itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130979 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Fix another case of <rdar://problem/9184212> that only occurs with codeCameron Zwarich
generated by llvm-gcc, since llvm-gcc uses 2 i64s for passing a 4 x float vector on ARM rather than an i64 array like Clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20The bitcast case here is actually handled uniformly earlier in the function, soCameron Zwarich
delete it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Cleanup some code to better use an early return style in preparation for addingCameron Zwarich
more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14Cleanup r129509 based on comments by ChrisMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14Cleanup r129472 by using a utility routine as suggested by Eli.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129509 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Vectors with different number of elements of the same element type can haveMon P Wang
the same allocation size but different primitive sizes(e.g., <3xi32> and <4xi32>). When ScalarRepl promotes them, it can't use a bit cast but should use a shuffle vector instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Remove PHINode::reserveOperandSpace(). Instead, add a parameter toJay Foad
PHINode::Create() giving the (known or expected) number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30(Almost) always call reserveOperandSpace() on newly created PHINodes.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29Do some simple copy propagation through integer loads and stores when promotingCameron Zwarich
vector types. This helps a lot with inlined functions when using the ARM soft float ABI. Fixes <rdar://problem/9184212>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128453 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-26Fix a typo and add a test.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Fix PR9464 by correcting some math that just happened to be right in most casesCameron Zwarich
that were hit in practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-16Fix a comment.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127728 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-16Only convert allocas to scalars if it is profitable. The profitability metric ICameron Zwarich
chose is having a non-memcpy/memset use and being larger than any native integer type. Originally I chose having an access of a size smaller than the total size of the alloca, but this caused some minor issues on the spirit benchmark where SRoA runs again after some inlining. This fixes <rdar://problem/8613163>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127718 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-16Better use initializer lists.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-16Add a clarifying comment.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127715 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Fix a crasher introduced by r127317 that is seen on the bots when using anCameron Zwarich
alloca as both integer and floating-point vectors of the same size. Bugpoint is not cooperating with me, but I'll try to find a manual testcase tomorrow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Add support to scalar replacement for partial vector accesses of an alloca, e.g.Cameron Zwarich
a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the use of vector intrinsics, especially in NEON when programmers know the layout of the register file. This enables codegen to eliminate a lot of the subregister traffic it would otherwise generate. This commit only enables this for a small number of floating-point cases, but a lot more integer cases. I assume this is okay for all ports, but I did not do extensive testing of the quality of code involving i512 vectors and the like. If there is a use case where this generates worse code than before, let me know and we can scale it back. This fixes <rdar://problem/9036264>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Move vector type merging to a separate function in preparation for it gettingCameron Zwarich
more complicated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15convert ConstantVector::get to use ArrayRef.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14revert my ConstantVector patch, it seems to have made the llvm-gccChris Lattner
builders unhappy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Switch ConstantVector::get to use ArrayRef instead of a pointer+sizeChris Lattner
idiom. Change various clients to simplify their code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24Give GetUnderlyingObject a TargetData, to keep it in syncDan Gohman
with BasicAA's DecomposeGEPExpression, which recently began using a TargetData. This fixes PR8968, though the testcase is awkward to reduce. Also, update several off GetUnderlyingObject's users which happen to have a TargetData handy to pass it in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24enhance SRoA to promote allocas that are used by PHI nodes. This oftenChris Lattner
occurs because instcombine sinks loads and inserts phis. This kicks in on such apps as 175.vpr, eon, 403.gcc, xalancbmk and a bunch of times in spec2006 in some app that uses std::deque. This resolves the last of rdar://7339113. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23Enhance SRoA to promote allocas that are used by selects in someChris Lattner
common cases. This triggers a surprising number of times in SPEC2K6 because min/max idioms end up doing this. For example, code from the STL ends up looking like this to SRoA: %202 = load i64* %__old_size, align 8, !tbaa !3 %203 = load i64* %__old_size, align 8, !tbaa !3 %204 = load i64* %__n, align 8, !tbaa !3 %205 = icmp ult i64 %203, %204 %storemerge.i = select i1 %205, i64* %__n, i64* %__old_size %206 = load i64* %storemerge.i, align 8, !tbaa !3 We can now promote both the __n and the __old_size allocas. This addresses another chunk of rdar://7339113, poor codegen on stringswitch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23Enhance SRoA to be more aggressive about scalarization of aggregate allocasChris Lattner
that have PHI or select uses of their element pointers. This can often happen when instcombine sinks two loads into a successor, inserting a phi or select. With this patch, we can scalarize the alloca, but the pinned elements are not yet promoted. This is still a win for large aggregates where only one element is used. This fixes rdar://8904039 and part of rdar://7339113 (poor codegen on stringswitch). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23have AllocaInfo store the alloca being inspected, simplifying callers.Chris Lattner
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23Rearrange some code a bit. Change MarkUnsafe to Chris Lattner
handle the "Transformation preventing inst" printing, so that -scalarrepl -debug will always print the rejected instruction. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23remove an old hack that avoided creating MMX datatypes. TheChris Lattner
X86 backend has been fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Remove outdated references to dominance frontiers.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Roll r123609 back in with two changes that fix test failures with expensiveCameron Zwarich
checks enabled: 1) Use '<' to compare integers in a comparison function rather than '<='. 2) Use the uniqued set DefBlocks rather than Info.DefiningBlocks to initialize the priority queue. The speedup of scalarrepl on test-suite + SPEC2000 + SPEC2006 is a bit less, at just under 16% rather than 17%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Roll out r123609 due to failures on the llvm-x86_64-linux-checks bot.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Eliminate the use of dominance frontiers in PromoteMemToReg. In addition toCameron Zwarich
eliminating a potentially quadratic data structure, this also gives a 17% speedup when running -scalarrepl on test-suite + SPEC2000 + SPEC2006. My initial experiment gave a greater speedup around 25%, but I moved the dominator tree level computation from dominator tree construction to PromoteMemToReg. Since this approach to computing IDFs has a much lower overhead than the old code using precomputed DFs, it is worth looking at using this new code for the second scalarrepl pass as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16tidy up a comment, as suggested by duncanChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16if an alloca is only ever accessed as a unit, and is accessed with ↵Chris Lattner
load/store instructions, then don't try to decimate it into its individual pieces. This will just make a mess of the IR and is pointless if none of the elements are individually accessed. This was generating really terrible code for std::bitset (PR8980) because it happens to be lowered by clang as an {[8 x i8]} structure instead of {i64}. The testcase now is optimized to: define i64 @test2(i64 %X) { br label %L2 L2: ; preds = %0 ret i64 %X } before we generated: define i64 @test2(i64 %X) { %sroa.store.elt = lshr i64 %X, 56 %1 = trunc i64 %sroa.store.elt to i8 %sroa.store.elt8 = lshr i64 %X, 48 %2 = trunc i64 %sroa.store.elt8 to i8 %sroa.store.elt9 = lshr i64 %X, 40 %3 = trunc i64 %sroa.store.elt9 to i8 %sroa.store.elt10 = lshr i64 %X, 32 %4 = trunc i64 %sroa.store.elt10 to i8 %sroa.store.elt11 = lshr i64 %X, 24 %5 = trunc i64 %sroa.store.elt11 to i8 %sroa.store.elt12 = lshr i64 %X, 16 %6 = trunc i64 %sroa.store.elt12 to i8 %sroa.store.elt13 = lshr i64 %X, 8 %7 = trunc i64 %sroa.store.elt13 to i8 %8 = trunc i64 %X to i8 br label %L2 L2: ; preds = %0 %9 = zext i8 %1 to i64 %10 = shl i64 %9, 56 %11 = zext i8 %2 to i64 %12 = shl i64 %11, 48 %13 = or i64 %12, %10 %14 = zext i8 %3 to i64 %15 = shl i64 %14, 40 %16 = or i64 %15, %13 %17 = zext i8 %4 to i64 %18 = shl i64 %17, 32 %19 = or i64 %18, %16 %20 = zext i8 %5 to i64 %21 = shl i64 %20, 24 %22 = or i64 %21, %19 %23 = zext i8 %6 to i64 %24 = shl i64 %23, 16 %25 = or i64 %24, %22 %26 = zext i8 %7 to i64 %27 = shl i64 %26, 8 %28 = or i64 %27, %25 %29 = zext i8 %8 to i64 %30 = or i64 %29, %28 ret i64 %30 } In this case, instcombine was able to eliminate the nonsense, but in PR8980 enough PHIs are in play that instcombine backs off. It's better to not generate this stuff in the first place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123571 91177308-0d34-0410-b5e6-96231b3b80d8
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