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2012-06-02Add definitions of 32/64-bit unaligned load/store instructions for Mips.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157865 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Define functions MipsTargetLowering::LowerLOAD and LowerSTORE whichAkira Hatanaka
custom-lower unaligned load and store nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Define Mips specific unaligned load/store nodes.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157863 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Expand unaligned i16 loads/stores for the Mips backend.Akira Hatanaka
This is the first of a series of patches which make changes to the backend to emit unaligned load/store instructions (lwl,lwr,swl,swr) during instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157862 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02In MipsMCInstLower::LowerSymbolOperand, get offset from symbol ifAkira Hatanaka
the MachineOperand type has a valid offset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157861 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01[arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0Chad Rosier
then DestReg is undefined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen
MCRegAliasIterator can optionally visit the register itself, allowing for simpler code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157837 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01X86: peephole optimization to remove cmp instructionManman Ren
This patch will optimize the following: sub r1, r3 cmp r3, r1 or cmp r1, r3 bge L1 TO sub r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can eliminate the "cmp" instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157831 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01ARM: properly handle alignment for struct byval.Manman Ren
Factor out the expansion code into a function. This change is to be enabled in clang. rdar://9877866 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg
This implements codegen support for accesses to thread-local variables using the local-dynamic model, and adds a clean-up pass so that the base address for the TLS block can be re-used between local-dynamic access on an execution path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Enable automatic detection of FMA3 support to allow intrinsics to be used.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying ↵Craig Topper
attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Add VFNSUB* instructions to folding table.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Remove a trailing space and fix a comment.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157801 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Tidy up. Remove trailing spaces and fix the worst of the 80 column violations.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01ARM: support struct byval in llvmManman Ren
We handle struct byval by inserting a pseudo op, which will be expanded to a loop at ExpandISelPseudos. A separate patch for clang will be submitted to enable struct byval. rdar://9877866 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157793 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Put the shiny new MCSubRegIterator to work.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Add support for return value promotion in X86 calling conventions.Jakob Stoklund Olesen
Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31X86: replace SUB with CMP if possibleManman Ren
This patch will optimize the following movq %rdi, %rax subq %rsi, %rax cmovsq %rsi, %rdi movq %rdi, %rax to cmpq %rsi, %rdi cmovsq %rsi, %rdi movq %rdi, %rax Perform this optimization if the actual result of SUB is not used. rdar: 11540023 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Add a PrintRegUnit helper similar to PrintReg.Jakob Stoklund Olesen
Reg-units are named after their root registers, and most units have a single root, so they simply print as 'AL', 'XMM0', etc. The rare dual root reg-units print as FPSCR~FPSCR_NZCV, FP0~ST7, ... The printing piggybacks on the existing register name tables, so no extra const data space is required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Fix typosJoel Jones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157752 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer
It was renamed in gcc/gas a while ago and causes all kinds of confusion because it was named differently in llvm and clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157745 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Added FMA3 Intel instructions.Elena Demikhovsky
I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks. I added tests for GodeGen and intrinsics. I did not change llvm.fma.f32/64 - it may be done later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Add intrinsic for pclmulqdq instruction.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Cleanup and factoring of mips16 tablegen classes. Make register classesAkira Hatanaka
CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16 jalr instruction. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157730 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Avoid depending on list orders and register numbering.Jakob Stoklund Olesen
This code is covered by test/CodeGen/ARM/arm-modifier.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157720 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Extract some pointer hacking to a function.Jakob Stoklund Olesen
Switch to MCSuperRegIterator while we're there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157717 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Add support for the mips inline asm 'm' output modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157709 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Fix some uses of getSubRegisters() to use getSubReg() instead.Jakob Stoklund Olesen
It is better to address sub-registers directly by name instead of relying on their position in the sub-register list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157703 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30it's pointed out that R11 can be used for magic things, and doing things ↵Chris Lattner
just for 64-bit registers is silly. Just optimize 3 more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157699 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Extend the (abi-irrelevant) return convention to be able to return more than ↵Chris Lattner
two values in integer registers. This is already supported by the fastcc convention, but it doesn't hurt to support it in the standard conventions as well. In cases where we can cheat at the calling convention, this allows us to avoid returning things through memory in more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157698 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30[arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.Chad Rosier
Patch by Jush Lu <jush.msn@gmail.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Port support for SSE4a extrq/insertq to the old jit code emitter.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157685 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29Add intrinsics, code gen, assembler and disassembler support for the SSE4a ↵Benjamin Kramer
extrq and insertq instructions. This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29Update CPPBackend to new API for AttrListPtr::get.Nicolas Geoffray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157624 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to ↵Stepan Dyatkovskiy
IntegersSubsetMapping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Fix predicate HasStandardEncoding in MipsInstrInfo.td per suggestion ofAkira Hatanaka
Benjamin Kramer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157504 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Delete MipsExpandPseudo.cpp.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157496 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo.Akira Hatanaka
Delete MipsExpandPseudo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157495 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Remove the code that expands MIPS' .cpload directive.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157494 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Remove the code that emits MIPS' .cprestore directive.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157493 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Remove pseudo instructions that are no longer used.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157492 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski
to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Simplify code for calling a function where CanLowerReturn fails, fixing a ↵Eli Friedman
small bug in the process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Shrink.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157433 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Remove the PTX back-end and all of its artifacts (triple, etc.)Justin Holewinski
This back-end was deprecated in favor of the NVPTX back-end. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Turn on mips16 pseudo op when compiling for mips16.Akira Hatanaka
Expand test case for this. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Enable Mips16 compiler to compile a null program.Akira Hatanaka
First code from the Mips16 compiler. Includes trivial test program. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Convert assert(0) to llvm_unreachable.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157380 91177308-0d34-0410-b5e6-96231b3b80d8
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