aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Collapse)Author
2012-08-03Add support for the ARM GHC calling convention, this patch was in 3.0,Eric Christopher
but somehow managed to be dropped later. Patch by Karel Gardas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02ARM: Tidy up. Remove unused template parameters.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02ARM: More InstAlias refactors to use #NAME#.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02ARM: Refactor instaliases using TableGen support for #NAME#.Jim Grosbach
Now that TableGen supports references to NAME w/o it being explicitly referenced in the definition's own name, use that to simplify assembly InstAlias definitions in multiclasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02X86 Peephole: fold loads to the source register operand if possible.Manman Ren
Add more comments and use early returns to reduce nesting in isLoadFoldable. Also disable folding for V_SET0 to avoid introducing a const pool entry and a const pool load. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161207 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka
of MipsTargetMachine.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161191 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Set transient stack alignment in constructor of MipsFrameLowering and re-enableAkira Hatanaka
test o32_cc_vararg.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161189 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Support fpv4 for ARM Cortex-M4.Jiangning Liu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161163 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ↵Jiangning Liu
index issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161161 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02X86 Peephole: fold loads to the source register operand if possible.Manman Ren
Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. This patch is a rework of r160919 and was tested on clang self-host on my local machine. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01X86: mark GATHER instructios as mayLoadManman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01ARM: Remove redundant instalias.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Clean up formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Whitespace.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Added FMA functionality to X86 target.Elena Demikhovsky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Add more indirection to the disassembler tables to reduce amount of space ↵Craig Topper
used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Implement MipsJITInfo::replaceMachineCodeForFunction.Akira Hatanaka
No new test case is added. This patch makes test JITTest.FunctionIsRecompiledAndRelinked pass on mips platform. Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161098 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01Remove unused variable.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emitsAkira Hatanaka
instructions that decrement and increment the stack pointer before and after a call when the function does not have a reserved call frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo andAkira Hatanaka
MipsSERegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31remove superfluous addr32 prefix bytes for zero-based sandboxAustin Benson
BUG=http://code.google.com/p/nativeclient/issues/detail?id=2927 TEST=spec2k Review URL: http://codereview.chromium.org/10834024/
2012-07-31Make ARM var-arg regsave setup aware of byval stack args. Previously we hadJan Voung
a LOCALMOD that disabled splitting "bvyal" arguments between the stack and registers, and only using the stack. However, this was not completely done. Var-args reg-saving was not aware of this change, and still attempted find any args following a byval in registers. http://codereview.chromium.org/10825082/
2012-07-31Restrict R15 with a flagAustin Benson
http://codereview.chromium.org/10820013/
2012-07-31Fix cases where fast instruction selection generated both base and indexKarl Schimpf
registers. BUG= http://code.google.com/p/nativeclient/issues/detail?id=2544 Review URL: http://chromiumcodereview.appspot.com/10808110
2012-07-31Add dst-only naclrest, nacljmpAustin Benson
Review URL: http://codereview.chromium.org/10806068/
2012-07-31clean up handling of sandbox memory references for x86-64Austin Benson
http://codereview.chromium.org/10803038/
2012-07-31Cherry-pick r159166 from upstream.Derek Schuff
It fixes the benchmark miscompilation and may help for others as well. Review URL: http://chromiumcodereview.appspot.com/10810028/
2012-07-31Add sfi-zero-based-sandbox option for zero-based sandbox model support on 64-bitAustin Benson
systems Review URL: http://codereview.chromium.org/10692083/
2012-07-31Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka
MipsSEFrameLowering. Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be reserved if there is a call with a large call frame or there are variable sized objects on the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Add Mips16InstrInfo.cpp and MipsSEInstrInfo.cpp to CMakeLists.txt.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka
and MipsSEInstrInfo (for mips32/64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Delete mips64 target machine classes. mips target machines can be used in placeAkira Hatanaka
of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Let PEI::calculateFrameObjectOffsets compute the final stack size rather thanAkira Hatanaka
computing it in MipsFrameLowering::emitPrologue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka
The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whetherAkira Hatanaka
or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and PseudoSE (mips32/64 pseudo) classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Change name of class MipsInst to InstSE to distinguish it from mips16'sAkira Hatanaka
instruction class. SE stands for standard encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31When store nodes or memcpy nodes are created to copy the function callAkira Hatanaka
arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and integer offset operands rather than frame object operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31[x86 frame lowering] In 32-bit mode, use ESI as the base pointer.Chad Rosier
Previously, we were using EBX, but PIC requires the GOT to be in EBX before function calls via PLT GOT pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161066 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined asAkira Hatanaka
single-precision load and store. Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect to map unaligned floating point load/store nodes to these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Make INSTRUCTION_SPECIFIER_FIELDS match X86DisassemblerCommon.h. Also remove ↵Craig Topper
trailing whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Tidy up trailing whitespaceCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31Tidy up trailing whitespaceCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161026 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cppKevin Enderby
where the other_half of the movt and movw relocation entries needs to get set and only with the 16 bits of the other half. rdar://10038370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoadCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The ↵Craig Topper
isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Give VCVTTPD2DQ priority over CVTTPD2DQ.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160941 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-11-14 01:41:15 +0000