aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Collapse)Author
2012-11-01Allow calls to absolute addressesDavid Sehr
Reverts a LOCALMOD that incorrectly patched an upstream issue. BUG= http://code.google.com/p/nativeclient/issues/detail?id=3110 TEST=none Review URL: https://codereview.chromium.org/11364030
2012-11-01When ARM triple CPU is unknown, assume +neon like in upstream LLVM.Eli Bendersky
This is related to issues #2751 and #3124. Neon support was added to the ARM validator recently. BUG= http://code.google.com/p/nativeclient/issues/detail?id=2751 Review URL: https://codereview.chromium.org/11368034
2012-11-01Use the relationship models infrastructure to add two relations - getPredOpcodePranav Bhandarkar
and getPredNewOpcode. The first relates non predicated instructions with their predicated forms and the second relates predicated instructions with their predicate-new forms. Patch by Jyotsna Verma! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Revert the majority of the next patch in the address space series:Chandler Carruth
r165941: Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis. Despite this commit log, this change primarily changed stuff outside of VMCore, and those changes do not carry any tests for correctness (or even plausibility), and we have consistently found questionable or flat out incorrect cases in these changes. Most of them are probably correct, but we need to devise a system that makes it more clear when we have handled the address space concerns correctly, and ideally each pass that gets updated would receive an accompanying test case that exercises that pass specificaly w.r.t. alternate address spaces. However, from this commit, I have retained the new C API entry points. Those were an orthogonal change that probably should have been split apart, but they seem entirely good. In several places the changes were very obvious cleanups with no actual multiple address space code added; these I have not reverted when I spotted them. In a few other places there were merge conflicts due to a cleaner solution being implemented later, often not using address spaces at all. In those cases, I've preserved the new code which isn't address space dependent. This is part of my ongoing effort to clean out the partial address space code which carries high risk and low test coverage, and not likely to be finished before the 3.2 release looms closer. Duncan and I would both like to see the above issues addressed before we return to these changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Revert the series of commits starting with r166578 which introduced theChandler Carruth
getIntPtrType support for multiple address spaces via a pointer type, and also introduced a crasher bug in the constant folder reported in PR14233. These commits also contained several problems that should really be addressed before they are re-committed. I have avoided reverting various cleanups to the DataLayout APIs that are reasonable to have moving forward in order to reduce the amount of churn, and minimize the number of commits that were reverted. I've also manually updated merge conflicts and manually arranged for the getIntPtrType function to stay in DataLayout and to be defined in a plausible way after this revert. Thanks to Duncan for working through this exact strategy with me, and Nick Lewycky for tracking down the really annoying crasher this triggered. (Test case to follow in its own commit.) After discussing with Duncan extensively, and based on a note from Micah, I'm going to continue to back out some more of the more problematic patches in this series in order to ensure we go into the LLVM 3.2 branch with a reasonable story here. I'll send a note to llvmdev explaining what's going on and why. Summary of reverted revisions: r166634: Fix a compiler warning with an unused variable. r166607: Add some cleanup to the DataLayout changes requested by Chandler. r166596: Revert "Back out r166591, not sure why this made it through since I cancelled the command. Bleh, sorry about this! r166591: Delete a directory that wasn't supposed to be checked in yet. r166578: Add in support for getIntPtrType to get the pointer type based on the address space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Cleanup another place redundant SP maintainedMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31(For X86) Enhancement to add-carray/sub-borrow (adc/sbb) optimization.Shuxin Yang
The adc/sbb optimization is to able to convert following expression into a single adc/sbb instruction: (ult) ... = x + 1 // where the ult is unsigned-less-than comparison (ult) ... = x - 1 This change is to flip the "x >u y" (i.e. ugt comparison) in order to expose the adc/sbb opportunity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Fix a bug in the cost calculation of vector casts. Detect situations where ↵Nadav Rotem
bitcasts cost zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31llvm: build with fewer warningsJan Voung
Warnings: unused variables, unused functions, -Wreorder, and remember to return a value in a non-void function. Also remove setjmp/longjmp intrinsics for x86, which aren't being used now (no equivalents in ARM and no equivalent for x86-64 with the zero-based sandbox, etc.). This exposes a few more unused functions. BUG= none TEST= test-all Review URL: https://codereview.chromium.org/11345016
2012-10-31[mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enablesAkira Hatanaka
re-materialization of immediate loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Implement ADJCALLSTACKUP and ADJCALLSTACKDOWNReed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Add scalar forms of FMA4 VFNMSUB/VFNMADD to folding tables. Patch from ↵Craig Topper
Cameron McInally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167106 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Clean up redundant SP register maintained in X86 TLIMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31This patch addresses an ABI compatibility issue with empty aggregateBill Schmidt
parameters. Examples of these are: struct { } a; union { } b[256]; int a[0]; An empty aggregate has an address, although dereferencing that address is pointless. When passed as a parameter, an empty aggregate does not consume a protocol register, nor does it consume a doubleword in the parameter save area. Passing an empty aggregate by reference passes an address just as for any other aggregate. Returning an empty aggregate uses GPR3 as a hidden address of the return value location, just as for any other aggregate. The patch modifies PPCTargetLowering::LowerFormalArguments_64SVR4 and PPCTargetLowering::LowerCall_64SVR4 to properly skip empty aggregate parameters passed by value. The handling of return values and by-reference parameters was already correct. Built on powerpc64-unknown-linux-gnu and tested with no new regressions. A test case is included to test proper handling of empty aggregate parameters on both sides of the function call protocol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Align ARM stack 0mod16.David Sehr
Includes change to add some asserts to legalizing addresses for NaCl. BUG= http://code.google.com/p/nativeclient/issues/detail?id=3116 TEST=none Review URL: https://codereview.chromium.org/11285009
2012-10-30Add ARM M23 under an option.David Sehr
This will aid supporting M23 for our key applications. BUG=none TEST=none Review URL: https://codereview.chromium.org/11345042
2012-10-30X86 SSE: update rsqrtss and rcpss to use two source operands andManman Ren
the first source operand is tied to the destination operand. This is to accurately model the corresponding instructions where the upper bits are unmodified. rdar://12558838 PR14221 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30X86 MMX: optimize transfer from mmx to i32Manman Ren
We used to generate a store (movq) + a load. Now we use movd. rdar://9946746 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167056 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30[mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka
use the caller's stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167048 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Add code for saving formal argument information to MipsFunctionInfo. ThisAkira Hatanaka
information will be used by IsEligibleForTailCallOptimization to determine whether a call can be tail-call optimized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Add definition of function MipsTargetLowering::passArgOnStack which emits nodesAkira Hatanaka
for passing a function call argument on a stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Do not do tail-call optimization if target is mips16.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30PowerPC: Expand FSRQT for vector typesAdhemerval Zanella
This patch expands FSQRT for floating point vector types when altivec is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Enable ELF machine type to be specified explicitly in X86 backendMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30PowerPC: More support for Altivec compare operationsAdhemerval Zanella
This patch adds more support for vector type comparisons using altivec. It adds correct support for v16i8, v8i16, v4i32, and v4f32 vector types for comparison operators ==, !=, >, >=, <, and <=. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167015 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg
When the switch-to-lookup tables transform landed in SimplifyCFG, it was pointed out that this could be inappropriate for some targets. Since there was no way at the time for the pass to know anything about the target, an awkward reverse-transform was added in CodeGenPrepare that turned lookup tables back into switches for some targets. This patch uses the new TargetTransformInfo to determine if a switch should be transformed, and removes CodeGenPrepare::ConvertLoadToSwitch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Remove an invalid assert in TargetTransformImplHal Finkel
getCastInstrCost had an assert prohibiting scalar to vector casts. Such casts, however, are allowed. This should make the vectorizer buildbot happier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30ARM: Better disassembly for pc-relative LDR.Jim Grosbach
When the operand is a plain immediate rather than a label, print it as [pc, #imm] like we do for the Thumb2 wide encoding variant. rdar://12154503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler
We will make them delay slot forms if there is something that can be placed in the delay slot during a separate pass. Mips16 extended instructions cannot be placed in delay slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chanceJakub Staszak
to test it with chapni's fix (-mattr=+avx). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby
is 24 bits not 20 and the decoding needed to correctly handle converting the J1 and J2 bits to their I1 and I2 values to reconstruct the displacement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Revert r166971. It causes buildbot failure. To be investigated.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Remove unused variable.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166973 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Simplify code. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166972 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Allow to fold vector load if there is more than one bitcast, so in the case:Jakub Staszak
%0 = load <8 x i16>* %dest %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14> store <8 x i16> %1, <8 x i16>* %dest We get: vmovlpd (%eax), %xmm0, %xmm0 instead of: vmovaps (%eax), %xmm1 vmovsd %xmm1, %xmm0, %xmm0 No extra test-case is added. I just fixed the existing one (also it uses FileCheck now). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166971 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29This patch solves a problem with passing varargs parameters under the PPC64Bill Schmidt
ELF ABI. A varargs parameter consisting of a single-precision floating-point value, or of a single-element aggregate containing a single-precision floating-point value, must be passed in the low-order (rightmost) four bytes of the doubleword stack slot reserved for that parameter. If there are GPR protocol registers remaining, the parameter must also be mirrored in the low-order four bytes of the reserved GPR. Prior to this patch, such parameters were being passed in the high-order four bytes of the stack slot and the mirrored GPR. The patch adds a new test case to verify the correct code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Implement patterns for extloadi8 and extloadi16Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29[ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] isChad Rosier
equivalent to [expr1 + expr2]. See test cases for more examples. rdar://12470392 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Fix PR14204Michael Liao
- Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Fix typoJoerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Allow i32/i64 for 'f' constraint on PowerPC.Ulrich Weigand
This fixes PR12757. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166943 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Make sret register classes match for llc at -O0.Jan Voung
PointerTy() is i32, so we end up with EDI as the sret register. However, this means that the copy to RAX won't match. We could either copy to EAX to have the register classes match, or promote EDI to RDI then copy. It shouldn't matter much since only the lower 32-bits matter. The EDI -> EAX version is 2 bytes while the the RDI -> RAX version is 3 bytes, so let's pick the smaller one. Also augment existing test to tickle the NaCl triple. This is mostly to get the debugger test working (since the debugger test fails when optimization is turned on). BUG= http://code.google.com/p/nativeclient/issues/detail?id=3104 BUG= http://code.google.com/p/nativeclient/issues/detail?id=2544 TEST= ./scons bitcode=1 platform=x86-64 run_gdb_change_variable_test (with a hacked driver that use -O0 for llc) TEST= test/CodeGen/X86/fast-isel-x86-64.ll Review URL: https://codereview.chromium.org/11308022
2012-10-29Minor style fixes for TargetTransformationInfo and TargetTransformImplHans Wennborg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166936 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Expand all atomic ops for mips16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29PPCSubtarget.h: Add explicit braces.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166932 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29PPCSubtarget.h: Whitespace.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166931 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29This patch adds alignment information for long double to the 64-bit PowerPCBill Schmidt
ELF subtarget. The existing logic is used as a fallback to avoid any changes to the Darwin ABI. PPC64 ELF now has two possible data layout strings: one for FreeBSD, which requires 8-byte alignment, and a default string that requires 16-byte alignment. I've added a test for PPC64 Linux to verify the 16-byte alignment. If somebody wants to add a separate test for FreeBSD, that would be great. Note that there is a companion patch to update the alignment information in Clang, which I am committing now as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166928 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Silence a GCC warning about comparing signed and unsigned types.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166922 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29Calling TLI->getNumRegisters creates a circular dependency when building ↵Nadav Rotem
LLVM using cmake. Get the number of registers by calling getTypeLegalizationCost. PR14199. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166911 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-01-25 14:33:58 +0000