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2013-02-05Move MRI liveouts to MBlaze return instructions.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174408 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Move MRI liveouts to Hexagon return instructions.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Move MRI liveouts to ARM return instructions.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174406 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Move MRI liveouts to X86 return instructions.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Don't use MRI liveouts in R600.Jakob Stoklund Olesen
Something very strange is going on with the output registers in this target. Its ISelLowering code is inserting dangling CopyToReg nodes, hoping that those physregs won't get clobbered before the RETURN. This patch adds the output registers as implicit uses on RETURN instructions in the custom emission pass. I'd much prefer to have those CopyToReg nodes glued to the RETURNs, but I don't see how. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Avoid using MRI::liveout_iterator for computing VRSAVEs.Jakob Stoklund Olesen
The liveout lists are about to be removed from MRI, this is the only place they were used after register allocation. Get the live out V registers directly from the return instructions instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Remove getBundleSize methods from NaCl Asm backendsDerek Schuff
2013-02-05R600: Fold remaining CONST_COPY after expand pseudo instTom Stellard
Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174395 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05R600: improve inputs/interpolation handlingTom Stellard
Use one intrinsic for all sorts of interpolation. Use two separate unexpanded instructions to represent INTERP_XY and _ZW - this will allow to eliminate one part if it's not used. Track liveness of special interpolation regs instead of reserving them - this will allow to reuse those regs, lowering reg pressure. Patch By: Vadim Girlin v2[Vincent Lejeune]: Rebased against current llvm master Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05R600: Emit function name in the AsmPrinterTom Stellard
Emitting the function name allows us to check for it in the FileCheck tests so we can make sure FileCheck is checking the output of the correct function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05R600/SI: Add patterns for fcos and fsin.Tom Stellard
Fixes 37 piglit tests and allows e.g. FlightGear to run with radeonsi. Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Fix commentsEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174390 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Hexagon: Add V4 compare instructions. Enable relationship mappingJyotsna Verma
for the existing instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174389 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Fix signed-unsigned comparison warning.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Fix remaining StringRef abuse.Tim Northover
This should fix the valgrind buildbot failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05ARM cost model: Cost for scalar integer casts and floating point conversionsArnold Schwaighofer
Also adds some costs for vector integer float conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174371 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Fix formatting in AArch64 backend.Tim Northover
This should fix three purely whitespace issues: + 80 column violations. + Tab characters. + TableGen brace placement. No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Remove cyclic dependency in AArch64 librariesTim Northover
This moves the bit twiddling and string fiddling functions required by other parts of the backend into a separate library. Previously they resided in AArch64Desc, which created a circular dependency between various components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174369 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05This patch that sets the Mips ELF header flag for Jack Carter
MicroMips architectures. Contributer: Zoran Jovanovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174360 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05This patch that sets the EmitAlias flag in td files Jack Carter
and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05This patch changes a static_cast to dyn_castJack Carter
for MipsELFStreamer objects. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04Remove the unnecessary hack and document the actually necessary one.Derek Schuff
2013-02-04Merge remote-tracking branch 'origin/master'Derek Schuff
2013-02-04Cherry-pick not-yet-committed upstream change to fix relaxation at bundle endDerek Schuff
2013-02-04Make some LLVM localmods compile when building with --disable-assertions.Jan Voung
Also, wrap some more debug code under the DEBUG() macro so that it gets pruned with --disable-assertions. BUG=none Review URL: https://codereview.chromium.org/12162006
2013-02-04Hexagon: Add V4 combine instructions and some more Def Pats for V2.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174331 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04Disable a couple more vector splat optimizations on PPC.Benjamin Kramer
I didn't see those because the test case used "not grep". FileCheck the test and XFAIL it, preserving the old optimization, so this can be fixed eventually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04Fix some abuses of StringRefTim Northover
We were taking a StringRef to a temporary result, which can go horribly wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04X86: Open up some opportunities for constant folding by postponing shift ↵Benjamin Kramer
lowering. Fixes PR15141. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04X86: Simplify code. No functionality change.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174326 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04SelectionDAG: Teach FoldConstantArithmetic how to deal with vectors.Benjamin Kramer
This required disabling a PowerPC optimization that did the following: input: x = BUILD_VECTOR <i32 16, i32 16, i32 16, i32 16> lowered to: tmp = BUILD_VECTOR <i32 8, i32 8, i32 8, i32 8> x = ADD tmp, tmp The add now gets folded immediately and we're back at the BUILD_VECTOR we started from. I don't see a way to fix this currently so I left it disabled for now. Fix some trivially foldable X86 tests too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174325 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04Give explicit suffix to integer constant over 32-bits.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174324 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04More MSan/ASan annotations.Evgeniy Stepanov
This change lets us bootstrap LLVM/Clang under ASan and MSan. It contains fixes for 2 issues: - X86JIT reads return address from stack, which MSan does not know is initialized. - bugpoint tests run binaries with RLIMIT_AS. This does not work with certain Sanitizers. We are no longer including config.h in Compiler.h with this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174306 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04ARM cost model: Penalize insertelement into D subregistersArnold Schwaighofer
Swift has a renaming dependency if we load into D subregisters. We don't have a way of distinguishing between insertelement operations of values from loads and other values. Therefore, we are pessimistic for now (The performance problem showed up in example 14 of gcc-loops). radar://13096933 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174300 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04PPCDarwinAsmPrinter::EmitStartOfAsmFile(): Add checking range in ↵NAKAMURA Takumi
CPUDirectives[]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04PPCDarwinAsmPrinter::EmitStartOfAsmFile(): Add possible elements in ↵NAKAMURA Takumi
CPUDirectives[]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174297 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-02Start static relocation implementation for mips16.Reed Kotler
This checkin makes hello world work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174264 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Add notes about future PowerPC featuresBill Schmidt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174232 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01LLVM enablement for some older PowerPC CPUsBill Schmidt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174230 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Two changes relevant to LEA and x32:David Sehr
1) allows the use of RIP-relative addressing in 32-bit LEA instructions under x86-64 (ILP32 and LP64) 2) separates the size of address registers in 64-bit LEA instructions from control by ILP32/LP64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats".Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174193 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Add appropriate TSFlags to the instructions that must be always extended.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Remove currently unused register decoder from AArch64.Tim Northover
This should fix a warning when building this backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174177 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Switch the code added in r173885 to use the new, shiny RTTIChandler Carruth
infrastructure on MCStreamer to test for whether there is an MCELFStreamer object available. This is just a cleanup on the AsmPrinter side of things, moving ad-hoc tests of random APIs to a direct type query. But the AsmParser completely broken. There were no tests, it just blindly cast its streamer to an MCELFStreamer and started manipulating it. I don't have a test case -- this actually failed on LLVM's own regression test suite. Unfortunately the failure only appears when the stars, compilers, and runtime align to misbehave when we read a pointer to a formatted_raw_ostream as-if it were an MCAssembler. =/ UBSan would catch this immediately. Many thanks to Matt for doing about 80% of the debugging work here in GDB, Jim for helping to explain how exactly to fix this, and others for putting up with the hair pulling that ensued during debugging it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Give the MCStreamer class hierarchy LLVM RTTI facilities for use withChandler Carruth
isa<> and dyn_cast<>. In several places, code is already hacking around the absence of this, and there seem to be several interfaces that might be lifted and/or devirtualized using this. This change was based on a discussion with Jim Grosbach about how best to handle testing for specific MCStreamer subclasses. He said that this was the correct end state, and everything else was too hacky so I decided to just make it so. No functionality should be changed here, this is just threading the kind through all the constructors and setting up the classof overloads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Update AMDGPURegisterInfo::eliminateFrameIndex() corresponding to r174083.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31R600: Fold clamp, neg, absTom Stellard
Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31R600: Consider bitcast when folding const_address node.Tom Stellard
Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31R600: Make store_dummy intrinsic more general by passing export typeTom Stellard
Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Remove unused variable, which should have been removed with r174083.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174094 91177308-0d34-0410-b5e6-96231b3b80d8
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