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2006-07-15Remove what little AIX support we have. It has never been tested and isn'tChris Lattner
complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14Add an out-of-line virtual method for X86DwarfWriter to give it a home.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29153 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14Add missing PPC64 extload/truncstoresChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14Add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-13Another fix in the rotate encodings, needed when the first two operands are notChris Lattner
the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12Print negative immediates as negative values instead of large constantsChris Lattner
when using the immshifted addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12Fix encoding of rotates, such as rldiclChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29128 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12Implement PPC64 relocations typesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12An overaggressive #ifdef allows a function to fall off the bottom of theChris Lattner
function instead of returning a value. This sometimes allowed the ppc32 jit to be used in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12Add information preventing several register class constraints from working.Chris Lattner
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11The PPC64 JIT needs register numbers to encode instructions.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29114 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11Emit inc / dec of registers as one byte instruction.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11It was pointed out that DEBUG() is only available with -debug.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11Ensure that dump calls that are associated with asserts are removed fromJim Laskey
non-debug build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11add the memri memory operandRafael Espindola
this makes it possible for ldr instructions with non-zero immediate git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11Implement the inline asm 'A' constraint. This implements PR825 andChris Lattner
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10New entry.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10Fixed stack objects do not specify alignments, but their offsets are known.Evan Cheng
Use that information when doing the transformation to merge multiple loads into a 128-bit load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswapsChris Lattner
into i16/i32 load/stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10Mark internal function staticChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10create the raddr addressing mode that matches any register and the frame indexRafael Espindola
use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07X86 target specific DAG combine: turn build_vector (load x), (load x+4),Evan Cheng
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and unaligned). e.g. __m128 test(float a, float b, float c, float d) { return _mm_set_ps(d, c, b, a); } _test: movups 4(%esp), %xmm0 ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06Undisable ppc64 jitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06Added option -code-model to set code model (only used in 64-bit) mode. ValidEvan Cheng
values include small, kernel, medium, large, and default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05Reorg. No functionality change.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05Fix JIT on non MacOS X i386 systems.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28992 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-03These are already implementedAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28990 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-030 offsets for memory operandsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28989 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29Should just use xorps to clear XMM registers for all data types. pxor is ↵Evan Cheng
also one byte longer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28984 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29Let X86CompilationCallback pass previous frame and return address to ↵Evan Cheng
X86CompilationCallback2. Remove alloca hack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28982 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29Add shift and rotate by 1 instructions / patterns.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29Always use xorps to clear XMM registers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28979 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29Move .literal4 and .literal8 support into AsmPrinter.cppEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28978 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Hide x86 symbolsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28976 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Use hidden visibility to make symbols in an anonymous namespace getChris Lattner
dropped. This shrinks libllvmgcc.dylib another 67K git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28shrink libllvmgcc.dylib another 25KChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28971 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Doh.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28963 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Oops. Need to keep CP index.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28958 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Darwin puts float and double literal constants into literal4 and literal8 ↵Evan Cheng
sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27this case isn't handledAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27handle the "mov reg1, reg2" case in isMoveInstrRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28944 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Fix ppc64 jump tablesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Remove dead code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Print stubs for external globals right.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28936 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Implement 64-bit select, bswap, etc.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Add a pattern for i64 sra. Print 8-byte units with a space between the .quadChris Lattner
and the data git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27Fix rewriting frame offsets with ixaddr instructions, which implicitly shiftChris Lattner
the offset two bits to the left. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27PPC doesn't have bit converts to/from i64Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28932 91177308-0d34-0410-b5e6-96231b3b80d8
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