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2008-11-26Emit declaration for globals and externs.Sanjiv Gupta
Custom lower AND, OR, XOR bitwise operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26Fish kill flag annotations in PUSH instructions.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60095 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-26__fastcall and __stdcall are mingw extensions to gcc for windows. Use theNick Lewycky
__attribute__ notation which is supported on more platforms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60083 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-25CellSPU:Scott Michel
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the best that the A-form and D-form address predicates catch everything before the code decides to emit a X-form address. (b) Expand vector store test cases to include the usual suspects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60034 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-25CellSPU: Relax constraints on when to generate a X-form address, evidentlyScott Michel
they were too tight according to bug 3126. Fix bug 3126. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-25CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby".Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59998 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24- Make lowering of "add with overflow" customizable by back-ends.Bill Wendling
- Mark "add with overflow" as having a custom lowering for X86. Give it a null lowering representation for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59971 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24CellSPU:Scott Michel
(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to directly zero-extend i32 to i64, but use rotates and shifts for sign extension. Also ensure unified register consistency. (b) Add new test harness for i64 operations: i64ops.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59970 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24CellSPU:Scott Michel
(a) Improve the extract element code: there's no need to do gymnastics with rotates into the preferred slot if a shuffle will do the same thing. (b) Rename a couple of SPUISD pseudo-instructions for readability and better semantic correspondence. (c) Fix i64 sign/any/zero extension lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59965 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24If the type legalizer actually legalized anythingDuncan Sands
(this doesn't happen that often, since most code does not use illegal types) then follow it by a DAG combiner run that is allowed to generate illegal operations but not illegal types. I didn't modify the target combiner code to distinguish like this between illegal operations and illegal types, so it will not produce illegal operations as well as not producing illegal types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24Fix comments.Matthijs Kooijman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59958 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24Move target independent td files from lib/Target/ to include/llvm/Target so ↵Evan Cheng
they can be distributed along with the header files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24Added missing description for -disable-mmx option.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59929 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23Rename SetCCResultContents to BooleanContents. InDuncan Sands
practice these booleans are mostly produced by SetCC, however the concept is more general. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23Added -disable-mmx using a patch from Preston Gurd.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59901 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-22CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was itScott Michel
ever conceived to occur). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59891 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-22Make a convenient helper for printing offsets.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21CellSPU:Scott Michel
(a) Fix bgs 3052, 3057 (b) Incorporate Duncan's suggestions re: i1 promotion (c) Indentation updates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59790 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU:Scott Michel
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy. (b) Remove truncated stores that will never be used. (c) Add initial support for __muldi3 as a libcall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Allow XMM2 and XMM3 to be used for non ABI compliant code.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU: Custom lower truncating stores of i8 to i1 (should not have beenScott Michel
promote), fix signed conversion of indexed offsets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59707 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU: Adjust spacing/tabulationScott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Eliminate a compile time warning.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59678 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Eliminate a compile time warning.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Experimental post-pass scheduling support. Post-pass schedulingDan Gohman
is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59655 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19CellSPU: Do not custom lower i1 stores, rely on type legalization to do theScott Michel
right thing and promote the store to i8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19<rdar://problem/6351057>Stuart Hastings
Discourage (allocate last) use of x86_64 R12 and R13 due to their longer instruction encodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Temporary check-in for Duncan to demonstrate CellSPU store problem.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59637 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Forgot to add this in the previous commit.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Fixed build warnings.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59621 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19Added a more function PIC16 backend. However to get this working a patch inSanjiv Gupta
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59617 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-18Don't set neverHasSideEffects on x86's divide instructions, sinceDan Gohman
they trap on divide-by-zero, and this side effect is otherwise unmodeled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-18Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-17Move some former testcases (low-probability codegenDale Johannesen
optimizations) into this wishlist. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59455 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-15Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes
well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59378 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-15Fix fuitos encoding.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14Remove unneeded stuff from GRAD register class.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59311 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14[XCore] Remove whitespace in the description used whenRichard Osborne
registering XCoreTargetMachine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14[XCore] Fix expansion of 64 bit add/sub. Don't custom expandRichard Osborne
these operations if ladd/lsub are not available on the current subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-14Add XCore intrinsics for getid (returns thread id) and bitrev (reversesRichard Osborne
bits in a word). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13Handle the rest of pseudo instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59275 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13Lazy compilation callback save / restore VFP registers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13Extend InlineAsm::C_Register to allow multiple specific registersDale Johannesen
(actually, code already all worked, only the comment changed). Use this to implement 'A' constraint on x86. Fixes PR 1779. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13fsub{d|s} encoding bugs.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59234 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13Missed a break statement.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59231 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13Fix pre- and post-indexed load / store encoding bugs.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59230 91177308-0d34-0410-b5e6-96231b3b80d8
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