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2009-07-08- Add some NEON ld / st instruction static encoding.Evan Cheng
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy. Patch by Sean Callanan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Change how so_imm and t2_so_imm are handled. At instruction selection time, ↵Evan Cheng
the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Recommit r74952 with a bug fix:Bill Wendling
DWARF requires frame moves be specified at specific times. If you have a prologue like this: __Z3fooi: Leh_func_begin1: LBB1_0: ## entry pushl %ebp Llabel1: movl %esp, %ebp Llabel2: pushl %esi Llabel3: subl $20, %esp call "L1$pb" "L1$pb": popl %esi The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp, %ebp" makes %ebp the new stack frame register, so that needs to be specified in DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs to be specified in DWARF. Before, all of this logic was in one method. This didn't work too well, because as you can see there are multiple FDE line entries that need to be created. This fix creates the "MachineMove" objects directly when they're needed; instead of waiting until the end, and losing information. There is some ugliness where we generate code like this: LBB22_0: ## entry pushl %ebp Llabel280: movl %esp, %ebp Llabel281: Llabel284: pushl %ebp <---------- pushl %ebx pushl %edi pushl %esi Llabel282: subl $328, %esp Notice the extra "pushl %ebp". If we generate a "machine move" instruction in the FDE for that pushl, the linker may get very confused about what value %ebp should have when exitting the function. I.e., it'll give it the value %esp instead of the %ebp value from the first "pushl". Not to mention that, in this case, %ebp isn't modified in the function (that's a separate bug). I put a small hack in to get it to work. It might be the only solution, but should be revisited once the above case is fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Missed an exit during the conversion.Torok Edwin
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Implement changes from Chris's feedback.Torok Edwin
Finish converting lib/Target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Implement NEON vst1 instruction.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Fix cmake build.Xerxes Ranby
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Convert more abort() calls to llvm_report_error().Torok Edwin
Also remove trailing semicolon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Push methods into base class in preparation for sharing.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Implement NEON vld1 instructions.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Start converting to new error handling API.Torok Edwin
cerr+abort -> llvm_report_error assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Start breaking out common base functionality for register info.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Checkpoint Thumb2 Instr info work. Generalized base code so that it can be ↵David Goodwin
shared between ARM and Thumb2. Not yet activated because register information must be generalized first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the ↵Sanjiv Gupta
terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Remove the vicmp and vfcmp instructions. Because we never had a release withNick Lewycky
these instructions, no autoupgrade or backwards compatibility support is provided. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Add a Thumb2 instruction flag to that indicates whether the instruction can ↵Evan Cheng
be transformed to 16-bit variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Add a todo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Also statically set bit 25 for BR_JT instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Statically encode bit 25 to indicate immediate form of data processing ↵Evan Cheng
instructions. Patch by Sean Callanan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07--- Reverse-merging (from foreign repository) r74952 into '.':Bill Wendling
U lib/Target/X86/X86RegisterInfo.cpp U lib/Target/X86/X86RegisterInfo.h Temporarily revert. This was causing an infinite loop in the linker on Leopard. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Commit the file I actually changed as part of lastDale Johannesen
patch, instead of one I didn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07DWARF requires frame moves be specified at specific times. If you have aBill Wendling
prologue like this: __Z3fooi: Leh_func_begin1: LBB1_0: ## entry pushl %ebp Llabel1: movl %esp, %ebp Llabel2: pushl %esi Llabel3: subl $20, %esp call "L1$pb" "L1$pb": popl %esi The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp, %ebp" makes %ebp the new stack frame register, so that needs to be specified in DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs to be specified in DWARF. Before, all of this logic was in one method. This didn't work too well, because as you can see there are multiple FDE line entries that need to be created. This fix creates the "MachineMove" objects directly when they're needed; instead of waiting until the end, and losing information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Add Thumb2 movcc instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Add BX and BXr9 encodings. Patch by Sean Callanan.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Have scoped mutexes take referenes instead of pointers.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Add Thumb2 pkhbt / pkhtb.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Add some more Thumb2 multiplication instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-0780 col violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Don't accept globals as matching 'i' constraintDale Johannesen
in PIC modes (in accordance with existing comment). gcc.apple/asm-block-25.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Avoid directly relying on llvm.dbg.compile_unit and llvm.dbg.global_variables.Devang Patel
PIC16 developers, please verify. Thanks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Add FIXMEs.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06isThumb2 really should mean thumb2 only, not thumb2+.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Add bfc to armv6t2.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Added ARM::mls for armv6t2.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06pic16 doesn't have a Data64bitsDirective. Set it NULL explicitly to tell the ↵Sanjiv Gupta
generic code to not pick the default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74839 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06pic16 isn't ready to handle llvm.metadata yet.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Implement _CONFIG macro to allow users to se to configuration settings on ↵Sanjiv Gupta
the part. Implement _section macro to allow users to place objects in specific sections. Implement _address macro to allow users to place objects at a particular address. Placing objects at a memory address: crate a unique section name from varname, address, object type and put that section at specified address. Mark this section a full (size = banksize) so that other objects do not compete for it while placing objects to sections in AsmPrinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74822 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Corrected the names description. Change in a comment. No functionality change.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes
cleanup, removed some #includes and moved Object Code Emitter out-of-line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Silence a warning when assertions are turned off.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Silence a warning when assertions are turned off.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Silence warning when building without assertions.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Silence warnings when assertions are turned off.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03For extended loads of type i1 to i8, we will need to at least one byte from ↵Sanjiv Gupta
memory. The change in the .td file is to mark the side effects of mov insn. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Various small changes related to the Condition Register on PowerPC.Tilmann Scheller
Don't spill to the CR save area when using the SVR4 ABI for now. Don't rely on constants assigned for registers to be in order (they aren't assigned in order). Make sure CR bits are mapped to the corresponding CR field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Refactor ABI code in the PowerPC backend.Tilmann Scheller
Make CalculateParameterAndLinkageAreaSize() Darwin-specific. Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin(). Rename MachoABI to DarwinABI for consistency. Rename ELF ABI to SVR4 ABI for consistency. Factor out common call return lowering between the Darwin and SVR4 ABI. Factor out common call lowering between the Darwin and SVR4 ABI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Implement the SVR4 ABI for PowerPC.Tilmann Scheller
Implement LowerFORMAL_ARGUMENTS_SVR4(). Implement LowerCALL_SVR4(). Add support for split arguments. Implement by value parameter passing for aggregates. Add support for variable argument lists. Create the spill area for argument registers of variable argument functions no longer at a fixed offset. Make sure callee saved registers are spilled to the correct stack offsets. Change allocation order of non-volatile floating-point registers. Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls. Add support for variable argument calls with Vector arguments. Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers. Stop creating illegal i8 values in LowerVASTART(). Add memory access width hints. Make sure to reserve space on the stack for the frame pointer. When using the SVR4 ABI, reserve r13 for the Small Data Area pointer. Assure that the frame pointer is spilled to the correct location on the stack. Some FP registers were not marked as volatile. Make sure the i64 words from a long double are passed either both in registers or both on the stack. Only put integer arguments in registers which are not marked with the inreg flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed ↵Tilmann Scheller
arguments in a vararg call. With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack. The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Small cleanups in the PowerPC backend.Tilmann Scheller
Small refactoring in LowerFORMAL_ARGUMENTS(). Correct minor formatting issues. Remove size argument of CreateCopyOfByValArgument(). Remove dead argument from CalculateStackSlotSize(). Remove unused variable ReturnAddrIndex from various targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74763 91177308-0d34-0410-b5e6-96231b3b80d8
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