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AgeCommit message (Expand)Author
2012-10-23Silence -Wsign-compareMatt Beaumont-Gay
2012-10-23[ms-inline asm] Add an implementation of the offset operator. This is a followChad Rosier
2012-10-23Add custom UINT_TO_FP from v4i8/v4i16/v8i8/v8i16 to v4f32/v8f32Michael Liao
2012-10-23Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1Michael Liao
2012-10-23This is another TLC patch for separating code for the Darwin and ELF ABIsBill Schmidt
2012-10-23implement setXX patternsReed Kotler
2012-10-22When a block ends in an indirect branch, add its successors to the machine ba...Bill Wendling
2012-10-22Add support for annotated disassembly output for X86 and arm.Kevin Enderby
2012-10-22[ms-inline asm] Add the isOffsetOf() function.Chad Rosier
2012-10-22[ms-inline asm] Add support for parsing the offset operator. Callback for Chad Rosier
2012-10-19[ms-inline asm] Reset the opcode prior to parsing a statement.Chad Rosier
2012-10-19[mips] Use 64-bit registers to return an sret pointer if target ABI is N64.Akira Hatanaka
2012-10-19[mips] Add code to do tail call optimization.Akira Hatanaka
2012-10-19[mips] Fix TAILCALL's operand node type.Akira Hatanaka
2012-10-19[mips] Delete MipsFunctionInfo::MaxCallFrameSize which is no longer used.Akira Hatanaka
2012-10-19[mips] Add tail call instructions.Akira Hatanaka
2012-10-19[mips] Make the branch nodes used in jump instructions a template parameter.Akira Hatanaka
2012-10-19Add node and enum for mips tail call.Akira Hatanaka
2012-10-19[ms-inline asm] Have the TargetParser callback to Sema to determine the size ofChad Rosier
2012-10-19This patch is to fix radar://8426430. It is about llvm support of __builtin_d...Shuxin Yang
2012-10-19Lower BUILD_VECTOR to SHUFFLE + INSERT_VECTOR_ELT for X86Michael Liao
2012-10-19ARM:Stepan Dyatkovskiy
2012-10-18Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerin...Nadav Rotem
2012-10-18Fix a bug where a 32-bit address with the high bit does not get symbolicatedKevin Enderby
2012-10-18This patch fixes failures in the SingleSource/Regression/C/uint64_to_floatUlrich Weigand
2012-10-18Temporarily revert the TargetTransform changes.Bob Wilson
2012-10-17Add conditional branch instructions and their patterns.Reed Kotler
2012-10-17Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().Jakob Stoklund Olesen
2012-10-17Check for empty YMM use-def lists in X86VZeroUpper.Jakob Stoklund Olesen
2012-10-17Fix fallout from RegInfo => FrameLowering refactoring on MSP430.Anton Korobeynikov
2012-10-17Check SSSE3 instead of SSE4.1Michael Liao
2012-10-17Fix setjmp on models with non-Small code model nor non-Static relocation modelMichael Liao
2012-10-16Support v8f32 to v8i8/vi816 conversion through custom loweringMichael Liao
2012-10-16This patch addresses PR13949.Bill Schmidt
2012-10-16Issue:Stepan Dyatkovskiy
2012-10-16Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.NAKAMURA Takumi
2012-10-16Move X86MCInstLower class definition into implementation file. It's not neede...Craig Topper
2012-10-16Pass in the context to the Attributes::get method.Bill Wendling
2012-10-15Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao
2012-10-15ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach
2012-10-15Move the Attributes::Builder outside of the Attributes class and into its own...Bill Wendling
2012-10-15[ms-inline asm] If we parsed a statement and the opcode is valid, then it's a...Chad Rosier
2012-10-15[ms-inline asm] Update the end loc for ParseIntelMemOperand.Chad Rosier
2012-10-15[ms-inline asm] Use incoming argument rather than hard coding to false.Chad Rosier
2012-10-15Resubmit the changes to llvm core to update the functions to support differen...Micah Villmow
2012-10-15PowerPC: add EmitTCEntry class for TOC creationAdhemerval Zanella
2012-10-15Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga
2012-10-15Attributes RewriteBill Wendling
2012-10-14Don't pass in an Attributes object to something that expects an integral value.Bill Wendling
2012-10-13X86: Disable long nops for all cpus prior to pentiumpro/i686.Benjamin Kramer
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