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path: root/lib/Target/XCore
AgeCommit message (Expand)Author
2013-05-05[XCore] Add LDAPB instructions.Richard Osborne
2013-05-05[XCore] Update LDAP to use pcrel_imm.Richard Osborne
2013-05-05[XCore] Rename calltarget -> pcrel_imm.Richard Osborne
2013-05-05[XCore] Add BLRB instructions.Richard Osborne
2013-05-05[XCore] Remove '-' from back branch asm syntax.Richard Osborne
2013-05-04Fix buildbot failure on 64 bit linux due to std::max() having differentRichard Osborne
2013-05-04[XCore] Remove unused operand type.Richard Osborne
2013-05-04[XCore] Make use of the target independent global address offset folding.Richard Osborne
2013-05-04[XCore] Simplify code that checks for an aligned base plus a constant.Richard Osborne
2013-05-04[XCore] Move lowering of thread local storage to a separate pass.Richard Osborne
2013-05-04[XCore] Use static relocation model by default.Richard Osborne
2013-04-19ArrayRefize getMachineNode(). No functionality change.Michael Liao
2013-04-04[XCore] Add bru instruction.Richard Osborne
2013-04-04[XCore] The RRegs register class is a superset of GRRegs.Richard Osborne
2013-03-22Allow the register scavenger to spill multiple registersHal Finkel
2013-03-08DAGCombiner: Use correct value type for checking legality of BR_CC v3Tom Stellard
2013-03-01Fix PR10475Michael Liao
2013-02-21Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky
2013-02-20Update TargetLowering ivars for name policy.Jim Grosbach
2013-02-17[XCore] Add missing 2r instructions.Richard Osborne
2013-02-17[XCore] Add TSETR instruction.Richard Osborne
2013-02-17[XCore] Add missing u10 / lu10 instructions.Richard Osborne
2013-02-17[XCore] Add missing u6 / lu6 instructions.Richard Osborne
2013-02-05Move MRI liveouts to XCore return instructions.Jakob Stoklund Olesen
2013-01-31[PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier
2013-01-27[XCore] Add missing l2rus instructions.Richard Osborne
2013-01-27[XCore] Add missing l2r instructions.Richard Osborne
2013-01-27[XCore] Add missing 1r instructions.Richard Osborne
2013-01-27[XCore] Add missing 0r instructions.Richard Osborne
2013-01-25Add instruction encodings / disassembly support for l4r instructions.Richard Osborne
2013-01-25Use the correct format in the STW / SETPSC instruction names.Richard Osborne
2013-01-25Fix order of operands for crc8_l4rRichard Osborne
2013-01-25Add instruction encodings / disassembly support for l5r instructions.Richard Osborne
2013-01-25Fix order of operands for l5r instructions.Richard Osborne
2013-01-25Use correct mnemonic / instruction name for ldivu.Richard Osborne
2013-01-23Add instruction encodings / disassembly support for l6r instructions.Richard Osborne
2013-01-22Add instruction encodings / disassembly support for u10 / lu10 instructions.Richard Osborne
2013-01-21Fix some incorrectly named u10 / lu10 instructions.Richard Osborne
2013-01-21Remove unused multiclass.Richard Osborne
2013-01-21Add instruction encodings / disassembly support for u6 / lu6 instructions.Richard Osborne
2013-01-21Add instruction encoding / disassembly support for ru6 / lru6 instructions.Richard Osborne
2013-01-21Use correct format for the LDAWCP instruction (u6).Richard Osborne
2013-01-20Add instruction encodings / disassembly support for l2rus instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembly support for l3r instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembler support for 2rus instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembly support 3r instructions.Richard Osborne
2013-01-09Last in the series of removing unnecessary '0' arguments forEric Christopher
2013-01-07Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth
2013-01-02Resort the #include lines in include/... and lib/... with theChandler Carruth
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