Age | Commit message (Collapse) | Author |
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104272 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
after testing before committing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103681 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103677 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
lower them to the correct x86-64 instructions since we
don't have a clean way to handle this in td files yet.
rdar://7947184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103668 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103535 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
instructions which have no direct register usage.
Darwin 'as' accepts:
add $0, (%rax)
but rejects
mov $0, (%rax)
for example.
Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103015 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
- The idea is that when a match fails, we just try to match each of +'b', +'w',
+'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
it. If all match, we assume it is width generic, and take the 'l' form.
- This would be a horrible hack, if it weren't so simple. Therefore it is an
elegant solution! Chris gets the credit for this particular elegant
solution. :)
- Next step to making this more robust is to have the X86 matcher generate the
mnemonic prefix information. Ideally we would also compute up-front exactly
which mnemonic to attempt to match, but this may require more custom code in
the matcher than is really worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103012 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
in memory operands. rdar://7874844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
believe this fixes the last memory leaks under test/MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99102 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
- This hack will eventually be replaced with a robust mechanism for handling
matching instructions based on the available target features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98858 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
other functionality on 403.gcc compiled at -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98405 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
x86_32-encoding.s in on expectation of it passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95806 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95252 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95158 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
== 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95137 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
movl $0, %eax
as
movl 0, %eax
Feel free to guess how well that worked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94869 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
register, and use to cleanup a FIXME in X86AsmParser.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94859 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
movw $8, (_cost_table_-L97$pb)+66(%eax)
After the parens, we could still have a binop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94345 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
target-specific AsmLexer, and added the appropriate
registration calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94275 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
be static. Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94266 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94129 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93916 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
MCAsmParser, and changed the target-specific AsmParsers
to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93900 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
identifier. There is no way to work around it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93896 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
unneeded argument from ParseExpression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93536 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
X86Operand's have range info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93535 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
to return range information for subexpressions. Use this to
provide range info for several new X86Operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93534 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93532 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
X86Operand::Create* implementations to avoid
copy ctor use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93528 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93526 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
datastructure when parsing a mem operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93521 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93469 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93457 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93454 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82054 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
that things like .word can be parsed as target specific. Moved parsing .word
out of AsmParser.cpp into X86AsmParser.cpp as it is 2 bytes on X86 and 4 bytes
for other targets that support the .word directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81461 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81122 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
from MCAsmLexer.h in preparation of supporting other targets. Changed the
X86AsmParser code to reflect this by removing AsmLexer::LexPercent and looking
for AsmToken::Percent when parsing in places that used AsmToken::Register.
Then changed X86ATTAsmParser::ParseRegister to parse out registers as an
AsmToken::Percent followed by an AsmToken::Identifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80929 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Also, use MCInst::print instead of custom code in MCAsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80575 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
specific printer (this only works on x86, for now).
- This makes it possible to do some correctness checking of the parsing and
matching, since we can compare the results of 'as' on the original input, to
those of 'as' on the output from llvm-mc.
- In theory, we could now have an easy ATT -> Intel syntax converter. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78986 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78642 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
on target specific operands for testing class membership and converting to
MCInst operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78597 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
- We can now discriminate SUB32ri8 from SUB32ri, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
|