| Age | Commit message (Expand) | Author |
|---|
| 2013-05-06 | Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions. | Jyotsna Verma |
| 2013-05-03 | Fix missing include in Hexagon code for Release+Asserts | Reid Kleckner |
| 2013-05-02 | reverting r180953 | Jyotsna Verma |
| 2013-05-02 | Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions. | Jyotsna Verma |
| 2013-05-02 | Hexagon: Honor __builtin_expect by using branch probabilities. | Jyotsna Verma |
| 2013-05-01 | Hexagon: Use multiclass for Jump instructions. | Jyotsna Verma |
| 2013-05-01 | Hexagon: Clear isKill flag on the predicate register in | Jyotsna Verma |
| 2013-04-23 | Hexagon: Remove assembler mapped instruction definitions. | Jyotsna Verma |
| 2013-04-23 | Hexagon: Remove duplicate instructions to handle global/immediate values | Jyotsna Verma |
| 2013-03-29 | Hexagon: Add emitFrameIndexDebugValue function to emit debug information. | Jyotsna Verma |
| 2013-03-28 | Hexagon: Replace switch-case in isDotNewInst with TSFlags. | Jyotsna Verma |
| 2013-03-22 | Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and w... | Jyotsna Verma |
| 2013-03-14 | Hexagon: Removed asserts regarding alignment and offset. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Use MO operand flags to mark constant extended instructions. | Jyotsna Verma |
| 2013-03-01 | Hexagon: Add constant extender support framework. | Jyotsna Verma |
| 2013-02-13 | Hexagon: add support for predicate-GPR copies. | Anshuman Dasgupta |
| 2013-02-13 | Hexagon: Use absolute addressing mode loads/stores for global+offset | Jyotsna Verma |
| 2013-02-12 | Hexagon: Add support to generate predicated absolute addressing mode | Jyotsna Verma |
| 2013-02-11 | Extend Hexagon hardware loop generation to handle various additional cases: | Krzysztof Parzyszek |
| 2013-02-11 | Implement HexagonInstrInfo::analyzeCompare. | Krzysztof Parzyszek |
| 2013-02-01 | Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats". | Jyotsna Verma |
| 2013-01-17 | Add indexed load/store instructions for offset validation check. | Jyotsna Verma |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-11-29 | Use multiclass for 'transfer' instructions. | Jyotsna Verma |
| 2012-11-20 | Removing some unused instruction definitions from the Hexagon backend. | Jyotsna Verma |
| 2012-11-01 | Use the relationship models infrastructure to add two relations - getPredOpcode | Pranav Bhandarkar |
| 2012-06-13 | *typo: Cyles changed to Cycles | Kay Tiong Khoo |
| 2012-05-14 | Revert 156634 upon request until code improvement changes are made. | Brendon Cahoon |
| 2012-05-13 | Hexagon: Initialize TBB to 0. | Benjamin Kramer |
| 2012-05-12 | Make sure new value jump is enabled for Hexagon V5 as well. | Sirish Pande |
| 2012-05-12 | Support for Hexagon feature, New Value Jump. | Sirish Pande |
| 2012-05-11 | Hexagon constant extender support. | Brendon Cahoon |
| 2012-05-10 | Hexagon V5 FP Support. | Sirish Pande |
| 2012-05-03 | Support for target dependent Hexagon VLIW packetizer. | Sirish Pande |
| 2012-05-03 | Extensions of Hexagon V4 instructions. | Sirish Pande |
| 2012-04-23 | Revert r155365, r155366, and r155367. All three of these have regression | Chandler Carruth |
| 2012-04-23 | Hexagon V5 (floating point) support. | Sirish Pande |
| 2012-04-23 | Support for Hexagon architectural feature, new value jump. | Sirish Pande |
| 2012-04-23 | Support for Hexagon VLIW Packetizer. | Sirish Pande |
| 2012-04-20 | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper |
| 2012-04-18 | This reverts a long string of commits to the Hexagon backend. These | Chandler Carruth |
| 2012-04-16 | Hexagon V5 (Floating Point) Support. | Sirish Pande |
| 2012-04-13 | Add support for Hexagon Architectural feature, New Value Jump. | Sirish Pande |
| 2012-04-13 | Silence various build warnings from Hexagon backend that show up in release b... | Craig Topper |
| 2012-04-12 | HexagonPacketizer patch. | Sirish Pande |
| 2012-04-12 | Hexagon: enable assembler output through the MC layer. | Evandro Menezes |
| 2012-03-17 | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper |
| 2012-02-22 | Efficient pattern for store truncate. Patch by Evandro Menezes. | Sirish Pande |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2012-02-15 | Optimize redundant sign extends and negation of predicates. | Sirish Pande |
