emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Collapse)	Author
2009-10-15	Fix ARM memory operand parsing of post indexing with just a base register, that	Kevin Enderby
	is just "[Rn]" and no tailing comma with an offset, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84205 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-15	More bits of the ARM target assembler for llvm-mc, code added to parse labels	Kevin Enderby
	as expressions, code for parsing a few arm specific directives (still needs the MCStreamer calls for these). Some clean up of the operand parsing code and adding some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13	Correct comment about ARM immediates using '#' not '$' and TODO for modifiers.	Kevin Enderby
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-13	More bits of the ARM target assembler for llvm-mc to parse immediates.	Kevin Enderby
	Also fixed a couple of coding style things that crept in. And added more to the temporary hacked up ARMAsmParser::MatchInstruction() method for testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12	Fix two warnings about unused variables that are only used in assert() calls.	Kevin Enderby
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12	Fix a problem in the code where ARMAsmParser::ParseShift() second argument	Kevin Enderby
	should have been a pointer to a reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09	Added another bit of the ARM target assembler to llvm-mc to parse register	Kevin Enderby
	lists. Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on errors so 0-15 values could be returned as register numbers. Also added the rest of the arm register names to the currently hacked up version to allow more testing. Some changes to ARMAsmParser::ParseOperand to give different errors for things not yet supported and some additions to the hacked ARMAsmParser::MatchInstruction to allow more testing for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07	Add another bit of the ARM target assembler to llvm-mc to parse registers	Kevin Enderby
	with writeback, things like "sp!", etc. Also added some more stuff to the temporarily hacked methods ARMAsmParser::MatchRegisterName and ARMAsmParser::MatchInstruction to allow more parser testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83477 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-06	Added bits of the ARM target assembler to llvm-mc to parse some load instruction	Kevin Enderby
	operands. Some parsing of arm memory operands for preindexing and postindexing forms including with register controled shifts. This is a work in progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15	Added the first bits of the ARM target assembler to llvm-mc. For now it only	Kevin Enderby
	parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will give an error is called. Broke out the test of the .word directive into two different test cases, one for x86 and one for arm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8