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path: root/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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2011-12-10ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09ARM add some pre-UAL VFP mnemonics for convenience when porting old code.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09ARM allows '' syntax, not just '#imm' for assembly.Jim Grosbach
Backwards compatibility with 'gas'. #imm is the preferered and documented syntax, but lots of existing code uses the '$' prefix, so we should support it if we can. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146285 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM convenience aliases for VSQRT.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM VSHR implied destination operand form aliases.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM asm parser, just issue a warning for a duplicate reg in a list.Jim Grosbach
For better 'gas' compatibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146185 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM assembler support for register name aliases.Jim Grosbach
rdar://10550084 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM NEON two-operand aliases for VSHL(immediate).Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM VFP support 'fmrs/fmsr' aliases for 'vldr'Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM VFP support 'flds/fldd' aliases for 'vldr'Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm".Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.Jim Grosbach
For 'gas' compatibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07ARM support the .arm and .thumb directives for assembly mode switching.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07ARM: NEON SHLL instruction immediate operand range checking.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06Thumb2 encoding choice correction for PLD.Jim Grosbach
Using encoding T1 for offset of #0 and encoding T2 for #-0. rdar://10532413 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05Tweak ADDrr fix. Bad check for explicit .wJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05Thumb2 prefer ADD register encoding T2 to T3 when possible.Jim Grosbach
rdar://10529664 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145860 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.Jim Grosbach
rdar://10529348 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02ARM NEON VEXT aliases for data type suffices.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02ARM VST1 single lane assembly parsing.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145718 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02ARM VLD1 single lane assembly parsing.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02Clean up aliases for ARM VLD1 single-lane assembly parsing a bit.Jim Grosbach
Add the 16-bit lane variants while I'm at it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02ARM start parsing VLD1 single lane instructions.Jim Grosbach
The alias pseudos need cleaned up for size suffix handling, but this gets the basics working. Will be cleaning up and adding more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29Tidy up a bit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Clean up debug printing of ARM shifted operands.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144836 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16ARM assembly parsing for RRX mnemonic.Jim Grosbach
rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16ARM mode aliases for bitwise instructions w/ register operands.Jim Grosbach
rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM assembly parsing for register range syntax for VLD/VST register lists.Jim Grosbach
For example, vld1.f64 {d2-d5}, [r2,:128]! Should be equivalent to: vld1.f64 {d2,d3,d4,d5}, [r2,:128]! It's not documented syntax in the ARM ARM, but it is consistent with what's accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to support. rdar://10451128 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM accept an immediate offset in memory operands w/o the '#'.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM enclosing curly braces optional on one-register VLD/VST instruction lists.Jim Grosbach
'vld1.f32 d4, [r7]' should be parsed as equivalent to 'vld1.f32 {d4}, [r7]' rdar://10450488. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Fix typo.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Thumb2 two-operand 'mul' instruction wide encoding parsing.Jim Grosbach
rdar://10449724 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Thumb2 assembly parsing for mul.w in IT block fix.Jim Grosbach
When the 3rd operand is not a low-register, and the first two operands are the same low register, the parser was incorrectly trying to use the 16-bit instruction encoding. rdar://10449281 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14Tidy up. 80 column.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12ARM refactor simple immediate asm operand render methods.Jim Grosbach
These immediate operands all use the same simple logic for rendering to MCInst, so have them share the method for doing so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11ARM vldm and vstm VFP instructions can take a data type suffix.Jim Grosbach
It's ignored by the assembler when present, but is legal syntax. Other instructions have something similar, but for some mnemonics it's only sometimes not significant, so this quick check in the parser will need refactored into something more robust soon-ish. This gets some basics working in the meantime. Partial for rdar://10435264 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11Nuke no longer accurate comment.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11ARM allow Q registers in vldm/vstm register lists.Jim Grosbach
rdar://9672822 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.Jim Grosbach
rdar://10429490 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM let processInstruction() tranforms chain.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb2 parsing for push/pop w/ hi registers in the reglist.Jim Grosbach
rdar://10130228. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb1 diagnostics for reglist on PUSH/POP fix.Jim Grosbach
Was not checking the first register in the register list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb MUL assembly parsing for 3-operand form.Jim Grosbach
Get the source register that isn't tied to the destination register correct, even when the assembly source operand order is backwards. rdar://10428630 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM .thumb_func directive for quoted symbol names.Jim Grosbach
Use the getIdentifier() method of the token, not getString(), otherwise we keep the quotes as part of the symbol name, which we don't want. rdar://10428015 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM assembly parsing for LSR/LSL/ROR(immediate).Jim Grosbach
More of rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM assembly parsing for ASR(immediate).Jim Grosbach
Start of rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06Replace (Lower|Upper)caseString in favor of StringRef's newest methods.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01ARM label operands can be quoted.Jim Grosbach
For example, labels from Objective-C sources. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143511 91177308-0d34-0410-b5e6-96231b3b80d8
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