emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Collapse)	Author
2006-08-16	Declare the callee saved regs	Rafael Espindola
	Remove the hard coded store and load of the link register Implement ARMFrameInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29727 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09	correctly set LocalAreaOffset of TargetFrameInfo	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29589 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09	fix the spill code	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29583 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09	fix the loading of the link register in emitepilogue	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08	change the addressing mode of the str instruction to reg+imm	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08	initial support for variable number of arguments	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29567 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21	implemented sub	Rafael Espindola
	correctly update the stack pointer in the prologue and epilogue git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18	initial prologue and epilogue implementation. Need to define add and sub ↵	Rafael Espindola
	before finishing it :-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11	add the memri memory operand	Rafael Espindola
	this makes it possible for ldr instructions with non-zero immediate git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10	create the raddr addressing mode that matches any register and the frame index	Rafael Espindola
	use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27	handle the "mov reg1, reg2" case in isMoveInstr	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-18	initial implementation of ARMRegisterInfo::eliminateFrameIndex	Rafael Espindola
	fixes test/Regression/CodeGen/ARM/ret_arg5.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18	implement movri	Rafael Espindola
	add a stub LowerFORMAL_ARGUMENTS git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18	getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.	Evan Cheng
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-14	added a skeleton of the ARM backend	Rafael Espindola
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8