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path: root/lib/Target/ARM/ARMInstrInfo.cpp
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2009-05-14Update the names of the exception handling sjlj instrinsics toJim Grosbach
llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html. (llvm.eh.sjlj.longjmp documentation coming when that implementation is added). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling
booleans. This gives a better indication of what the "addReg()" is doing. Remembering what all of those booleans mean isn't easy, especially if you aren't spending all of your time in that code. I took Jakob's suggestion and made it illegal to pass in "true" for the flag. This should hopefully prevent any unintended misuse of this (by reverting to the old way of using addReg()). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12Add support for GCC compatible builtin setjmp and longjmp intrinsics. This isJim Grosbach
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but rather used by the front-end as target hooks for exception handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07PR2985 / <rdar://problem/6584986>Jim Grosbach
When compiling in Thumb mode, only the low (R0-R7) registers are available for most instructions. Breaking the low registers into a new register class handles this. Uses of R12, SP, etc, are handled explicitly where needed with copies inserted to move results into low registers where the rest of the code generator can deal with them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68545 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03Wrap some lines to fix indentation problems.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03Fix some comments.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-18Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-13Remove refs to non-DebugLoc versions of BuildMI from ARM.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12Eliminate a couple of non-DebugLoc BuildMI variants.Dale Johannesen
Modify callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-12Move debug loc info along when the spiller creates new instructions.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64342 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-09Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nastyEvan Cheng
suprise to some callers, e.g. register coalescer. For now, add an parameter that tells AnalyzeBranch whether it's safe to modify the mbb. A better solution is out there, but I don't have time to deal with it right now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03Create DebugLoc information in FastISel. Several temporary methods wereBill Wendling
created. Specifically, those BuildMIs which use "DebugLoc::getUnknownLoc()". I'll remove them soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20Change TargetInstrInfo::isMoveInstr to return source and destination ↵Evan Cheng
sub-register indices as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Preliminary ARM debug support based on patch by Mikael of FlexyCore.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60851 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03Split foldMemoryOperand into public non-virtual and protected virtualDan Gohman
parts, and add target-independent code to add/preserve MachineMemOperands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-18Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03Minor code restructuring. No functionality change.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58643 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-16Const-ify several TargetInstrInfo methods.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Switch the MachineOperand accessors back to the short names likeDan Gohman
isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson
requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson
had to be propoagated down into all the targets and up into all clients of this API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman
MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-03- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, ↵Evan Cheng
propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. - Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-02Make LiveVariables even more optional, by making it optional in the call to ↵Owen Anderson
TargetInstrInfo::convertToThreeAddressInstruction Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman
the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-16Infrastructure for getting the machine code size of a function and an ↵Nicolas Geoffray
instruction. X86, PowerPC and ARM are implemented git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-30Fix "Control reaches the end of non-void function" warnings, Chris Lattner
patch by David Chisnall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15Replace all target specific implicit def instructions with a target ↵Evan Cheng
independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05Refactor code. Remove duplicated functions that basically do the same thing asEvan Cheng
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08It's not always safe to fold movsd into xorpd, etc. Check the alignment of ↵Evan Cheng
the load address first to make sure it's 16 byte aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-15Remove DefInst from LiveVariables::VarInfo. Use the facilities on ↵Owen Anderson
MachineRegisterInfo instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-11rename MachineInstr::setInstrDescriptor -> setDescChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45871 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07Only mark instructions that load a single value without extension as ↵Evan Cheng
isSimpleLoad = 1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45727 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner
Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07Rename all the M_* flags to be namespace qualified enums, and switch Chris Lattner
all clients over to using predicates instead of these flags directly. These are now private values which are only to be used to statically initialize the tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07remove MachineOpCode typedef.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45679 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner
that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson
Some day I'll get it all moved over... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-04Move some more functionality from MRegisterInfo to TargetInstrInfo.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-01Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-01Fix a problem where lib/Target/TargetInstrInfo.h would include and useChris Lattner
a header file from libcodegen. This violates a layering order: codegen depends on target, not the other way around. The fix to this is to split TII into two classes, TII and TargetInstrInfoImpl, which defines stuff that depends on libcodegen. It is defined in libcodegen, where the base is not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45475 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson
Machine-level API cleanup instigated by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30Add new shorter predicates for testing machine operands for various types: Chris Lattner
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner
Likewise setImmedValue -> setImm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30use simplified operand addition methods.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45437 91177308-0d34-0410-b5e6-96231b3b80d8
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