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path: root/lib/Target/ARM/ARMInstrInfo.cpp
AgeCommit message (Collapse)Author
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07Add lengthof and endof templates that hide a lot of sizeof computations.Owen Anderson
Patch by Sterling Stein! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-12ARM: make branch folder remove unconditional branchesDale Johannesen
following jump tables that it earlier inserted. This would be OK on other targets but is needed for correctness only on ARM (constant islands needs to find jump tables). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39782 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10Remove clobbersPred. Add an OptionalDefOperand to instructions which have ↵Evan Cheng
the 's' bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06Incorrect check.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05Reflects the chanegs made to PredicateOperand.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37898 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman
instruction flag, and use the flag along with a virtual member function hook for targets to override if there are instructions that are only trivially rematerializable with specific operands (i.e. constant pool loads). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman
with a general target hook to identify rematerializable instructions. Some instructions are only rematerializable with specific operands, such as loads from constant pools, while others are always rematerializable. This hook allows both to be identified as being rematerializable with the same mechanism. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15Instructions with unique labels or embedded jumptables cannot be duplicated ↵Evan Cheng
during ifcvt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37606 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13Handle blocks with 2 unconditional branches in AnalyzeBranch.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37571 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08Add a utility routine to check for unpredicated terminator instruction.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37528 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08Fix ARM condition code subsumission check.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-07Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a ↵Evan Cheng
compilation warning? I blame it on the FE folks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29Add missing const qualifiers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-23Hooks for predication support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37308 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21Fix some -march=thumb regressions. tBR_JTr is not predicable.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37272 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21BlockHasNoFallThrough() now returns true if block ends with a return ↵Evan Cheng
instruction; AnalyzeBranch() should ignore predicated instructionsd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18RemoveBranch() and InsertBranch() now returns number of instructions deleted ↵Evan Cheng
/ inserted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16PredicateInstruction returns true if the operation was successful.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16Removed isPredicable().Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16Hooks for predication support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37093 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15Add PredicateOperand to all ARM instructions that have the condition field.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29Rewrite of Thumb constant islands handling (exact allowance for paddingDale Johannesen
around islands and jump tables). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25Relex assertions to account for additional implicit def / use operands.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov
target for tabs checking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03Inverted logic.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35619 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26findRegisterUseOperand() changed.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35366 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19Fix naming inconsistencies.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07Spill / restore should avoid modifying the condition register.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33971 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30Copy and paste bug.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30Misseed thumb jumptable branch.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29Factor GetInstSize() out of constpool island pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26Make LABEL a builtin opcode.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19ARM backend contribution from Apple.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33353 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng
of opcode and number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24fix warning about missing newline at end of fileRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24implement uncond branch insertion, mark branches with isBranch.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31160 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13add shifts to addressing mode 1Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30291 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11partial implementation of the ARM Addressing Mode 1Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08change the addressing mode of the str instruction to reg+immRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10create the raddr addressing mode that matches any register and the frame indexRafael Espindola
use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27handle the "mov reg1, reg2" case in isMoveInstrRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23implement minimal versions ofRafael Espindola
ARMAsmPrinter::runOnMachineFunction LowerFORMAL_ARGUMENTS ARMInstrInfo::isMoveInstr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28431 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-14added a skeleton of the ARM backendRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
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