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path: root/lib/Target/ARM/ARMISelLowering.cpp
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2010-04-17Use const qualifiers with TargetLowering. This eliminates severalDan Gohman
const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Move per-function state out of TargetLowering subclasses and intoDan Gohman
MachineFunctionInfo subclasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Revise my previous change to ExpandBIT_CONVERT. I hadn't realized that thisBob Wilson
may be called when either the source or destination type is i64, and my change also hadn't fixed the most obvious problem -- assuming that i64 will only be bitconverted to f64, ignoring the various vector types. Radar 7873160. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101615 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle ↵Evan Cheng
is doing the right thing and codegen looks correct for both Thumb and Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Fix build.Anders Carlsson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Add -arm-long-calls option to force calls to be indirect. This makes theJim Grosbach
kernel linker happier when dealing with kexts. Radar 7805069 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson
does not have a legal type. The legalizer does not know how to handle those nodes. Radar 7854640. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Handle a v2f64 formal parameter that is split between registers and memoryBob Wilson
such that the entire second half is in memory. Radar 7855014. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101181 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-06Expand SELECT and SELECT_CC for NEON vector types.Bob Wilson
Radar 7770501. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100568 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04Reapply address space patch after fixing an issue in MemCopyOptimizer.Mon P Wang
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Revert r100191 since it breaks objc in clang Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Reapply address space patch after fixing an issue in MemCopyOptimizer.Mon P Wang
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99948 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30Added support for address spaces and added a isVolatile field to memcpy, ↵Mon P Wang
memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) A update of langref will occur in a subsequent checkin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99928 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24tweak the arm if conversion heuristicJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24try being more permissive for if-conversion on ARM V7. see what the nightlyJim Grosbach
test run permformance numbers say as to whether it helps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99355 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19Revert this change, since it was causing ARM performance regressions.Bob Wilson
--- Reverse-merging r98889 into '.': U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/ARMISelLowering.h U lib/Target/ARM/ARMInstrInfo.td U lib/Target/ARM/ARMInstrVFP.td U lib/Target/ARM/ARMISelLowering.cpp U lib/Target/ARM/ARMInstrFormats.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18Get rid of target-specific nodes for fp16 <-> fp32 conversion.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Translate "cc" clobber in ARM inline assembly to ARM::CCRRegisterClass.Bob Wilson
Radar 7459078. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15Now that the default for Darwin platforms is to place the LSDA into the TEXTBill Wendling
section, remove the target-specific code that performs this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98580 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14Add substarget feature for FP16Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98503 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14Add codegen support for FP16 on ARMAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09The ARM EH experiment worked!Bill Wendling
Place the LSDA into the TEXT section for ARM platforms. This involves making the encoding indirect, pcrel, and sdata4 instead of an absolute pointer. The references to the type infos are then non-lazy pointers. Revision 98019 changed the encoding of non-lazy pointers to add the symbol to the non-lazy pointer definition if it's a local symbol (otherwise, it's external and set to '0' so that the loader can adjust it to the real value). This paved the way for this change to work on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09This is part of an LLC-beta test used to test <rdar://problem/6804645>. PleaseBill Wendling
bear with the awful code. It won't last in its current state beyond tonight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02Remove dead parameter passing.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97536 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24Check for comparisons of +/- zero when optimizing less-than-or-equal andBob Wilson
greater-than-or-equal SELECT_CCs to NEON vmin/vmax instructions. This is only allowed when UnsafeFPMath is set or when at least one of the operands is known to be nonzero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24LowerCall() should always do getCopyFromReg() to reference the stack pointer.Jim Grosbach
Machine instruction selection is much happier when operands are in virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18Use NEON vmin/vmax instructions for floating-point selects.Bob Wilson
Radar 7461718. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15Remove an assumption of default arguments. This is in anticipation of aDavid Greene
change to SelectionDAG build APIs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96230 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08tighten up eh.setjmp sequence a bit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02Revert 95130.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02Pass callsite return type to TargetLowering::LowerCall and use that to check ↵Evan Cheng
sibcall eligibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.Anton Korobeynikov
Even if they are suported by the core, they can be disabled (this is just a configuration bit inside some register). Allow unaligned memops on darwin and conservatively disallow them otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27Eliminate target hook IsEligibleForTailCallOptimization.Evan Cheng
Target independent isel should always pass along the "tail call" property. Change target hook LowerCall's parameter "isTailCall" into a refernce. If the target decides it's impossible to honor the tail call request, it should set isTailCall to false to make target independent isel happy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19Wrap some comments to 80 columns.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-18Patch by David Conrad:Jim Grosbach
"On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction sequence it is now." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93758 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15Name change for consistency. No functional change.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15EmitAtomicCmpSwap() custome inserter needs to delete the MI passed in. ↵Jim Grosbach
EmitAtomicBinary() already does this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93479 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-14ARM "l" constraint for inline asm means R0-R7, also for Thumb2.Jakob Stoklund Olesen
This is consistent with llvm-gcc's arm/constraints.md. Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2 mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93436 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13Fix pastoJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93342 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Add more plumbing. This time in the LowerArguments and "get" functions whichBill Wendling
return partial registers. This affected the back-end lowering code some. Also patch up some places I missed before in the "get" functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21Delete the instruction just before the function terminates for consistency sake.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Fix libstdc++ build on ARM linux and part of PR5770.Rafael Espindola
MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done. Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts. For a patch that make us detect problems like this earlier, take a look at http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html With that patch we assert as soon and the new instruction is added to the garbage set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert between f64 (the default type for ARM "d" registers) and 64-bit Neon vector types. Radar 7457110. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15nand atomic requires opposite operand orderingJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14Add ARMv6 memory and sync barrier instructionsJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14Thumb2 atomic operationsJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14atomic binary operations up to 32-bits wide.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91260 91177308-0d34-0410-b5e6-96231b3b80d8
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