aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMAsmPrinter.cpp
AgeCommit message (Collapse)Author
2011-06-29Remove redundant Thumb2 ADD/SUB SP instruction definitions.Jim Grosbach
Unlike Thumb1, Thumb2 does not have dedicated encodings for adjusting the stack pointer. It can just use the normal add-register-immediate encoding since it can use all registers as a source, not just R0-R7. The extra instruction definitions are just duplicates of the normal instructions with the (not well enforced) constraint that the source register was SP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28Implement the 'M' output modifier for arm inline asm. This is fairlyEric Christopher
register allocation dependent and will occasionally break. WIP in the register allocator to model paired/etc registers. rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27Make size computation less brittle.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26Reorganize these slightly according to operand type.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26Mark tBX as an indirect branch rather than a return.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25Implement the 'm' modifier. Note that it only works for memory operands.Eric Christopher
Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. ThisCameron Zwarich
fixes <rdar://problem/9495913> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to betterCameron Zwarich
reflect their actual meaning and match the ARM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24Implement the arm 'L' asm modifier.Eric Christopher
Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24Implement the immediate part of the 'B' modifier.Eric Christopher
Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24Add more unimplemented asm modifiers and some documentation of what theyEric Christopher
do. Part of rdar://9119939. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24Add support for the arm 'y' asm modifier.Eric Christopher
Fixes part of rdar://9444657 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23Fix <rdar://problem/9476260> by having tail calls always generate 32-bit ↵Cameron Zwarich
branches in Darwin Thumb2 code. Tail calls are already disabled on Thumb1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20adds some attributes to attribute section when cpu is "xscale"Rafael Espindola
(this is what used in Android NDK, when architecture is ARMv5) patch by Koan-Sin Tan git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16sets bit 0 of the function address of thumb function in .symtabRafael Espindola
("T is 1 if the target symbol S has type STT_FUNC and the symbol addresses a Thumb instruction ;it is 0 otherwise." from "ELF for the ARM Architecture" 4.7.1.2) Patch by Koan-Sin Tan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Do not emit location expression size twice.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28Teach dwarf writer to handle complex address expression for .debug_loc entries.Devang Patel
This fixes clang generated blocks' variables' debug info. Radar 9279956. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27Revert r130178. It turned out to be not the optimal path to emit complex ↵Devang Patel
location expressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130326 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26Let dwarf writer allocate extra space in the debug location expression. This ↵Devang Patel
space, if requested, will be used for complex addresses of the Blocks' variables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Add asserts.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21Fix DWARF description of Q registers.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21Fix DWARF description of S registers.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15Fix a ton of comment typos found by codespell. Patch byChris Lattner
Luis Felipe Strano Moraes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-21We need to pass the TargetMachine object to the InstPrinter if we are printingBill Wendling
the alias of an InstAlias instead of the thing being aliased. Because we need to know the features that are valid for an InstAlias. This is part of a work-in-progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the sameJim Grosbach
actual instruction as the non-Darwin defs, but have different call-clobber semantics and so need separate patterns. They don't need to duplicate the encoding information, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Pseudo-ize the ARM 'B' instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach
effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05ARM assembler stuff is crazy: for .setfp positive values of offset ↵Anton Korobeynikov
corresponds to "add" instruction, not to "sub" as in .pad case git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05In Thumb1 mode the constant might be materialized via the load from ↵Anton Korobeynikov
constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05Implement frame unwinding information emission for Thumb1. Not finished yet ↵Anton Korobeynikov
because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05Add unwind information emission for thumb stuffAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05Preliminary support for ARM frame save directives emission via MI flags.Anton Korobeynikov
This is just very first approximation how the stuff should be done (e.g. ARM-only for now). More to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-02Fixing a bug when printing fpu text to object file. Patch by Mans Rullgard.Renato Golin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28Fix .fpu printing in ARM assembly, regarding bug ↵Renato Golin
http://llvm.org/bugs/show_bug.cgi?id=8931 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-07ARM/MC/ELF Lowercase .cpu attributes in .s, but make them uppercase in .oJason W Kim
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-07Rework some .ARM.attribute work for improved gcc compatibility.Jason W Kim
Unified EmitTextAttribute for both Asm and Obj emission (.cpu only) Added necessary cortex-A8 related attrs for codegen compat tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21Last round of fixes for movw + movt global address codegen.Evan Cheng
1. Fixed ARM pc adjustment. 2. Fixed dynamic-no-pic codegen 3. CSE of pc-relative load of global addresses. It's now enabled by default for Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123991 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng
movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4)) movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4)) LPC0_0: add r0, pc, r0 It's not yet enabled by default as some tests are failing. I suspect bugs in down stream tools. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12JimG sez: "The value-kinds look like masks, but they're not consistently usedJason W Kim
that way, unfortunately. If you want to change them to work additively instead of a one-variant-kind-per-symbolref, that's great and I completely agree it's worth doing, but it really should be a separate patch. Until then, this isn't correct." So I am reverting this bit until a more opportune time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-121. Support ELF pcrel relocations for movw/movt:Jason W Kim
R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC. 2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum. 3. Add support for 3 new elf section types (no-ops) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11Clean up ARM subtarget code by using Triple ADT.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01Model operand restrictions of mul-like instructions on ARMv5 viaAnton Korobeynikov
earlyclobber stuff. This should fix PRs 2313 and 8157. Unfortunately, no testcase, since it'd be dependent on register assignments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122663 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr toBill Wendling
ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting misaligned references to the jump table from an ADR instruction. There is a test case, but unfortunately it's sensitive to random code changes. <rdar://problem/8782223> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Avoid report_fatal_error in ARM's PrintAsmOperand method.Bob Wilson
The standard error handling in AsmPrinter::EmitInlineAsm handles this much better, so just use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122100 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Refactor a bit for legibility.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Make sure to propagate the predicate operands for LEApcrel to ADR.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121788 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-09-24 04:38:42 +0000