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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168533 91177308-0d34-0410-b5e6-96231b3b80d8
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Give MCCFIInstruction a single, private constructor and add helper static
methods that create each type of cfi instruction. This is is preparation
for changing its representation. The representation with a pair
MachineLocations older than MC and has been abused quiet a bit to support
more cfi instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168532 91177308-0d34-0410-b5e6-96231b3b80d8
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Roman Divacky. I just added the testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168520 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168448 91177308-0d34-0410-b5e6-96231b3b80d8
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Our validator can now handle NEON instructions
BUG=2751
Review URL: https://codereview.chromium.org/11416110
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(svn r167699, also the 3.2 branch point)
Conflicts:
lib/Target/X86/X86Subtarget.cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167926 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrFormats.td
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Based on the patch by Logan Chien!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167633 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/ARM/ARMFrameLowering.cpp
lib/Target/Mips/MipsRegisterInfo.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Transforms/IPO/ExtractGV.cpp
tools/Makefile
tools/gold/gold-plugin.cpp
The only interesting conflict was X86ISelLowering.ccp, which
meant I had to essentially revert r167104. The problem is that we are
using ESP as the stack pointer in X86ISelLowering and RSP as the
stack pointer in X86FrameLowering, and that revision made them
both consistently use X86RegisterInfo to determine which to use.
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possible buffer change with a .macro directive.
rdar://12637628
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167408 91177308-0d34-0410-b5e6-96231b3b80d8
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run through the 'C' preprocessor. That is pick up the file name
and line numbers from the cpp hash file line comments for the
dwarf file and line numbers tables.
rdar://9275556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167237 91177308-0d34-0410-b5e6-96231b3b80d8
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Step 2 of fixing the problem described in BUG #3115.
BUG= http://code.google.com/p/nativeclient/issues/detail?id=3115
Review URL: https://codereview.chromium.org/11276064
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An optimization path in MCELFStreamer::EmitInstToData assumes we're in Nacl (by
calling ShouldCreateNewFragments). This was now predicated properly on
isBundlingEnabled.
This also fixes 14 LLVM test failures (part of Issue #1711 effort).
BUG= http://code.google.com/p/nativeclient/issues/detail?id=1711
Review URL: https://codereview.chromium.org/11269058
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Part of rdar://12576868
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166790 91177308-0d34-0410-b5e6-96231b3b80d8
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operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166779 91177308-0d34-0410-b5e6-96231b3b80d8
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AsmParser logic. To be used/tested in a subsequent commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166714 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/X86/X86FrameLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
The Intel folks switched some of the FrameLowering code to use
X86RegisterInfo::getSlotSize isntead of pointer size, thus reducing
our localmods in that file.
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This patch adds initial PPC64 TOC MC object creation using the small mcmodel
(a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC,
R_PPC64_TOC16, and R_PPC64_TOC16DS).
The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter'
is meant to avoid the creation of an unreferenced ".TOC." symbol (used in
the .odp creation) as well to set the R_PPC64_TOC relocation target as the
temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should
not point to any symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
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llvm revision 120104 applied our localmod upstream, but rev 120121
changed the patch to handle thread locals differently
http://llvm.org/viewvc/llvm-project?view=rev&revision=120104
http://llvm.org/viewvc/llvm-project?view=rev&revision=120121
BUG= none
Review URL: https://codereview.chromium.org/11267021
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see the offsetof operator. Previously, we were matching something like MOVrm
in the front-end and later matching MOVrr in the back-end. This change makes
things more consistent. It also fixes cases where we can't match against a
memory operand as the source (test cases coming).
Part of rdar://12470317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166592 91177308-0d34-0410-b5e6-96231b3b80d8
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and easier to read by adding a couple helper functions. Suggestion by
Chandler Carruth and seconded by Meador Inge!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166515 91177308-0d34-0410-b5e6-96231b3b80d8
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This change
- resolves conflicts from previous merges;
- prevents delay slot filler to use instructions that could be masked;
- generates calls to __nacl_read_tp to access thread pointer;
- removes previous (now obsolete) sandboxing code of unaligned loads and stores;
- propagates relocation model to MipsELFObjectWriter, so that it can set
flag ELF::EF_MIPS_PIC (small hack).
BUG= http://code.google.com/p/nativeclient/issues/detail?id=2275
TEST= pnacl/build.sh all
Review URL: https://codereview.chromium.org/11115013
Patch from Petar Jovanovic <petarj@mips.com>.
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Conflicts:
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/Mips/MipsISelLowering.h
lib/Target/X86/X86ISelLowering.h
lib/Target/X86/X86TargetMachine.h
tools/llc/llc.cpp
The only interesting conflict was ARMISelLowering, caused by
http://llvm.org/viewvc/llvm-project?view=rev&revision=166273
which actually removes a LOCALMOD for ARM byval lowering.
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on patch to r166433.
rdar://12470317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166488 91177308-0d34-0410-b5e6-96231b3b80d8
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.byte).
<rdar://problem/12470345>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166451 91177308-0d34-0410-b5e6-96231b3b80d8
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Per the October 12, 2012 Proposal for annotated disassembly output sent out by
Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc
tool now has a -mdis option to produced the marked up disassembly and a couple
of small example test cases have been added.
rdar://11764962
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166445 91177308-0d34-0410-b5e6-96231b3b80d8
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and friends.
It's unnecessary and makes the generated assembly less faithful to the original source.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166440 91177308-0d34-0410-b5e6-96231b3b80d8
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functions static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166376 91177308-0d34-0410-b5e6-96231b3b80d8
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No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166360 91177308-0d34-0410-b5e6-96231b3b80d8
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inline assembly. Also make sure the remove the ignored statements from the IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166357 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166352 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166349 91177308-0d34-0410-b5e6-96231b3b80d8
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a memory operand. Retain this information and then add the sizing directives
to the IR. This allows the backend to do proper instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166316 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166292 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166270 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/X86/X86TargetMachine.h
tools/llc/llc.cpp
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which will be used by the asm matcher in the near future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166222 91177308-0d34-0410-b5e6-96231b3b80d8
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*NamedDecl. In turn, build the expressions after we're finished parsing the
asm. This avoids a crasher if the lookup fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166212 91177308-0d34-0410-b5e6-96231b3b80d8
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layer. Add the ParseMSInlineAsm() function, which is the new interface to
clang. Also expose the new MCAsmParserSemaCallback interface, which is used
by the back-end to do name lookup in Sema. Finally, remove the now defunct
APIs introduced in r165946.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166183 91177308-0d34-0410-b5e6-96231b3b80d8
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in a future commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166054 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166051 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/X86/X86FrameLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
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an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165955 91177308-0d34-0410-b5e6-96231b3b80d8
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inline assembly. For the time being, these will be called directly by clang.
However, in the near future I expect these to be sunk back into the MC layer
and more basic APIs (e.g., getClobbers(), getConstraints(), etc.) will be called
by clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165946 91177308-0d34-0410-b5e6-96231b3b80d8
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This patch replaces the EmitRawText by a EmitTCEntry class (specialized for
each Streamer) in PowerPC64 TOC entry creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165940 91177308-0d34-0410-b5e6-96231b3b80d8
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the interface between the front-end and the MC layer when parsing inline
assembly. Unfortunately, this is too deep into the parsing stack. Specifically,
we're unable to handle target-independent assembly (i.e., assembly directives,
labels, etc.). Note the MatchAndEmitInstruction() isn't the correct
abstraction either. I'll be exposing target-independent hooks shortly, so this
is really just a cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
include/llvm/MC/MCAssembler.h
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/X86/X86TargetMachine.h
tools/llc/llc.cpp
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Conflicts:
lib/ExecutionEngine/JIT/JITEmitter.cpp
lib/MC/MCELFStreamer.cpp
lib/Target/ARM/ARMAsmPrinter.h
lib/Target/X86/X86RegisterInfo.td
lib/Target/X86/X86TargetMachine.cpp
tools/llc/llc.cpp
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