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2012-02-12This patch addresses the problem of poor code generation for the zextNadav Rotem
v8i8 -> v8i32 on AVX machines. The codegen often scalarizes ANY_EXTEND nodes. The DAGCombiner has two optimizations that can mitigate the problem. First, if all of the operands of a BUILD_VECTOR node are extracted from an ZEXT/ANYEXT nodes, then it is possible to create a new simplified BUILD_VECTOR which uses UNDEFS/ZERO values to eliminate the scalar ZEXT/ANYEXT nodes. Second, another dag combine optimization lowers BUILD_VECTOR into a shuffle vector instruction. In the case of zext v8i8->v8i32 on AVX, a value in an XMM register is to be shuffled into a wide YMM register. This patch modifes the second optimization and allows the creation of shuffle vectors even when the newly generated vector and the original vector from which we extract the values are of different types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11Add support for implicit TLS model used with MS VC runtime.Anton Korobeynikov
Patch by Kai Nacke! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11Add TargetPassConfig hooks for scheduling/bundling.Andrew Trick
In case the MachineScheduling pass I'm working on doesn't work well for another target, they can completely override it. This also adds a hook immediately after the RegAlloc pass to cleanup immediately after vregs go away. We may want to fold it into the postRA hook later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11Allow Post-RA LICM to hoist reserved register reads.Jakob Stoklund Olesen
When using register masks, registers like %rip are clobbered by the register mask. LICM should still be able to hoist instructions reading %rip from a loop containing calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11Handle register masks in local live range splitting.Jakob Stoklund Olesen
Again the goal is to produce identical assembly with register mask operands enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11Don't read PreRegAlloc before it is initialized.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Add a static MachineOperand::clobbersPhysReg().Jakob Stoklund Olesen
It can be necessary to detach a register mask pointer from its MachineOperand. This method is convenient for checking clobbered physregs on a detached bitmask pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Add register mask support to InterferenceCache.Jakob Stoklund Olesen
This makes global live range splitting behave identically with and without register mask operands. This is not necessarily the best way of using register masks for live range splitting. It would be more efficient to first split global live ranges around calls (i.e., register masks), and reserve the fine grained per-physreg interference guidance for global live ranges that do not cross calls. For now the goal is to produce identical assembly when enabling register masks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Remove unused variable.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Put instruction names into an indexed string table on the side, removing a ↵Benjamin Kramer
pointer from MCInstrDesc. Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10comment grammarAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick
Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Remove unused 'isAlias' parameter.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150224 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Constrain the regmask search space for local live ranges.Jakob Stoklund Olesen
When checking a local live range for interference, restrict the binary search to the single block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Cache basic block boundaries for faster RegMaskSlots access.Jakob Stoklund Olesen
Provide API to get a list of register mask slots and bits in a basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150219 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Optimize LiveIntervals::intervalIsInOneMBB().Jakob Stoklund Olesen
No looping and binary searches necessary. Return a pointer to the containing block instead of just a bool. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10Cache iterators. Some of these are expensive to create.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Add register mask support to RAGreedy.Jakob Stoklund Olesen
This only adds the interference checks required for correctness. We still need to take advantage of register masks for the interference driven live range splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150191 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Preserve physreg kills in MachineBasicBlock::SplitCriticalEdge.Lang Hames
Failure to preserve kills was causing LiveIntervals to miss some EFLAGS live ranges. Unfortunately I've been unable to reduce a good test case yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Fix kill flags when moving instructions using LiveIntervals::moveInstr(...).Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Remove assertion. Not all use operands are reads.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Improve TargetPassConfig. No intended functionality.Andrew Trick
Split CodeGen into stages. Distinguish between optimization and correctness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09commentAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Erase dead copies that are clobbered by a call.Jakob Stoklund Olesen
This does make a difference, at least when using RABasic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09Never delete instructions that define reserved registers.Jakob Stoklund Olesen
I think this was already the intention, but DeadMachineInstructionElim was accidentally tracking the liveness of reserved registers. Now, instructions with reserved defs are never deleted. This prevents the call stack adjustment instructions from getting deleted when enabling register masks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150116 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Handle register masks in MachineCopyPropagation.Jakob Stoklund Olesen
For simplicity, treat calls with register masks as basic block boundaries. This means we can't copy propagate callee-saved registers across calls, but I don't think that is a big deal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Codegen pass definition cleanup. No functionality.Andrew Trick
Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: MachineLICM.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150098 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: StackSlotColoring.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: PostRAScheduler.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Added TargetPassConfig::setOptAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Added Pass::createPass(ID) to handle pass configuration by IDAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Move pass configuration out of pass constructors: TailDuplicate::PreRegAllocAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150091 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Add Register mask support to RABasic.Jakob Stoklund Olesen
When a virtual register is live across a call, limit the search space to call-preserved registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Keep track of register masks in LiveIntervalAnalysis.Jakob Stoklund Olesen
Build an ordered vector of register mask operands (i.e., calls) when computing live intervals. Provide a checkRegMaskInterference() function that computes a bit mask of usable registers for a live range. This is a quick way of determining of a live range crosses any calls, and restricting it to the callee saved registers if it does. Previously, we had to discover call clobbers for each candidate register independently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08Added MachineInstr::isBundled() to check if an instruction is part of a bundle.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08misched: bug in debug output.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08stale commentAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07Remove tabs.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06Expose TargetPassConfig to PEI PassAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149927 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06Add TargetPassConfig to the PassManager for use inside passesAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06Don't explicitly renumber slot indices.Jakob Stoklund Olesen
We have automatic local renumbering now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149920 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06Make sure a reserved register has a live interval before merging.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06[unwind removal] Remove all of the code for the dead 'unwind' instruction. ThereBill Wendling
were no 'unwind' instructions being generated before this, so this is in effect a no-op. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06[unwind removal] We no longer have 'unwind' instructions being generated, soBill Wendling
remove the code that handles them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149901 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06DebugInfo: Provide a new hook to encode relationship between a property and ↵Devang Patel
an ivar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149874 91177308-0d34-0410-b5e6-96231b3b80d8
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