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2008-03-12We also need to collect the VN IDs for the PHI instructions for later updating.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48278 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12When we're determining what registers to coallesce, track the VNInfo IDs for ↵Owen Anderson
the definitions that feed the PHI instructions. We'll need these IDs in order to update LiveIntervals properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Total brain cramp.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Set NextMII after issuing a physical register spill.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48263 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Minor debug output bug.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48261 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman
that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Honour aliases visibility during asm emissionAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Transfer physical register spill info when load / store folding happens.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48246 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Use the correct value for InSignBit.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Initial codegen support for functions and calls with multiple return values.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb
failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48221 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11When the register allocator runs out of registers, spill a physical register ↵Evan Cheng
around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Some LegalizeTypes code factorization and minorDuncan Sands
enhancements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11compile: double test() {}Chris Lattner
into: _test: fldz ret instead of: _test: subl $12, %esp #IMPLICIT_DEF %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $12, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11variadic instructions don't have operand info for variadic arguments.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Generalize ExpandIntToFP to handle the case where the operand is legalDan Gohman
and it's the result that requires expansion. This code is a little confusing because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type (the integer type) rather than the result type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11If a register operand comes from the variadic part of a node, don'tChris Lattner
verify the register constraint matches what the instruction expects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Temporarily revert 48175.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48204 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11More APInt-ification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Correctly clone FlaggedNodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10APInt-ify this.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Implement more support for fp-to-i128 and i128-to-fp conversions. Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10If the register allocator ran out of registers, just abort for now.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48175 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Fix mul expansion to check the correct number of bits forDan Gohman
zero extension when checking if an unsigned multiply is safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Somewhat better solution.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Default ISD::PREFETCH to expand.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel
return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Minor cleanup. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where ↵Evan Cheng
the source is defined; BLR is the live range which is defined by the copy. If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g. A = or A, B ... B = A ... C = A<kill> ... = B then do not add kills of A to the newly created B interval. - Also fix some kill info update bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10DohEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Move StrongPHIElimination after live interval analysis. This will make ↵Owen Anderson
things happier down the road. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48138 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type ↵Evan Cheng
(e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Allow insert_subreg into implicit, target-specific values. Christopher Lamb
Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen
field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09remove an extraneous (and ugly) default argument, thanks Duncan.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09fp_round's produced by getCopyFromParts should always be exact, becauseChris Lattner
they are produced by calls (which are known exact) and by cross block copies which are known to be produced by extends. This improves: define double @test2() { %tmp85 = call double asm sideeffect "fld0", "={st(0)}"() ret double %tmp85 } from: _test2: subl $20, %esp # InlineAsm Start fld0 # InlineAsm End fstpl 8(%esp) movsd 8(%esp), %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $20, %esp #FP_REG_KILL ret to: _test2: # InlineAsm Start fld0 # InlineAsm End #FP_REG_KILL ret by avoiding a f64 <-> f80 trip git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09teach X86InstrInfo::copyRegToReg how to copy into ST(0) from Chris Lattner
an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Add ScheduleDAG support for copytoreg where the src/dst register areChris Lattner
in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09fix 80 col violationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48100 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09extend fp values with FP_EXTEND not FP_ROUND.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handlingChris Lattner
of BUILD_VECTORS that only have two unique elements: 1. The previous code was nondeterminstic, because it walked a map in SDOperand order, which isn't determinstic. 2. The previous code didn't handle the case when one element was undef very well. Now we ensure that the generated shuffle mask has the undef vector on the RHS (instead of potentially being on the LHS) and that any elements that refer to it are themselves undef. This allows us to compile CodeGen/X86/vec_set-9.ll into: _test3: movd %rdi, %xmm0 punpcklqdq %xmm0, %xmm0 ret instead of: _test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret ... saving a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48060 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08Teach SD some vector identities, allowing us to compile vec_set-9 into:Chris Lattner
_test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret instead of: _test3: #IMPLICIT_DEF %rax movd %rax, %xmm0 movd %rdi, %xmm1 punpcklqdq %xmm1, %xmm0 ret This is still not ideal. There is no reason to two xmm regs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng
and prefetchnta instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07Something that kills a super-register alsoBill Wendling
kills the sub-register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48038 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07Fixed a register scavenger bug. If a def is re-defining part of a super ↵Evan Cheng
register, there must be an implicit def of the super-register on the MI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48024 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06When setting the "unused" info, take into account something like this:Bill Wendling
%r3<def> = OR %x3<kill>, %x3 We don't want to mark the %r3 as unused even though it's a sub-register of %x3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48003 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-0680 col violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47998 91177308-0d34-0410-b5e6-96231b3b80d8
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