aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen
AgeCommit message (Collapse)Author
2006-02-09More changes to reduce frame size.Evan Cheng
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This prevents them from being inlined. Change getTargetNode() so they return SDNode * instead of SDOperand to prevent copying. It should also help compilation speed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26083 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09Adjust to MachineConstantPool interface change: instead of keeping aChris Lattner
value/alignment pair for each constant, keep a value/offset pair. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26078 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09rename fields of constant pool entriesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26076 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09Simplify code, alignment must be specified now.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09Make MachineConstantPool entries alignments explicitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26071 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08Add support for assembler directives that wrap inline asmChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26065 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08Compile this:Chris Lattner
xori r6, r2, 1 rlwinm r6, r6, 0, 31, 31 cmpwi cr0, r6, 0 bne cr0, LBB1_3 ; endif to this: rlwinm r6, r2, 0, 31, 31 cmpwi cr0, r6, 0 beq cr0, LBB1_3 ; endif git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26047 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06Add support for modifier characters to operand printersChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26021 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06Goodbye nasty macro.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26019 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06Edit requests from Sabre.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26018 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06Changing model for the construction of debug information.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26016 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05Back out previous commit, it isn't safe.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26006 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05fold c1 << (x + c2) into (c1 << c2) << x. fix a warning.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26005 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05Handle urem by shifted powers of 2.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26001 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26000 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05* Added SDNode::isOnlyUse().Evan Cheng
* Fix hasNUsesOfValue(), it should be const. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25990 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05make sure that global doubles are aligned to 8 bytesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25981 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05Implement the AsmPrinter::getPreferredAlignmentLog method.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25978 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Fix VC++ warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Get rid of some memory leaks identified by ValgrindEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25960 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Fix VC++ warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Add initial support for immediates. This allows us to compile this:Chris Lattner
int %rlwnm(int %A, int %B) { %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17) ret int %C } into: _rlwnm: or r2, r3, r3 or r3, r4, r4 rlwnm r2, r2, r3, 4, 17 ;; note the immediates :) or r3, r2, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25955 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Initial early support for non-register operands, like immediatesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25952 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04implementation of some methods for inlineasmChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25951 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Handle another case exposed on X86.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Fix a nasty problem on two-address machines in the following situation:Chris Lattner
store EAX -> [ss#0] [ss#0] += 1 ... use(EAX) In this case, it is not valid to rewrite this as: store EAX -> [ss#0] EAX += 1 store EAX -> [ss#0] ;;; this would also delete the store above ... use(EAX) ... because EAX is not a dead at that point. Keep track of which registers we are allowed to clobber, and which ones we aren't, and don't clobber the ones we're not supposed to. :) This should resolve the issues on X86 last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailableChris Lattner
and PhysRegsAvailable maps out into a new AvailableSpills struct. No functionality change. This paves the way for a bugfix, coming up next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Implement some feedback from sabreNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Add a framework for eliminating instructions that produces undemanded bits.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03remove some #ifdef'd out code, which should properly be in the dag combiner ↵Chris Lattner
anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03remove dead fnChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Add common code for reassociating ops in the dag combinerNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Fix VC++ compilation error caused by using a std::map iterator variable to ↵Jeff Cohen
receive a std::multimap iterator value. For some reason, GCC doesn't have a problem with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Remove move copies and dead stuff by not clobbering the result reg of a noop ↵Chris Lattner
copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Simplify some codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25924 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Add code that checks for noop copies, which triggers when either:Chris Lattner
1. a target doesn't know how to fold load/stores into copies, or 2. the spiller rewrites the input to a copy to the same register as the dest instead of to the reloaded reg. This will be moved/improved in the near future, but allows elimination of some ancient x86 hacks. This eliminates 92 copies from SMG2000 on X86 and 163 copies from 252.eon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Added case HANDLENODE to getOperationName().Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Physregs may hold multiple stack slot values at the same time. Keep trackChris Lattner
of this, and use it to our advantage (bwahahah). This allows us to eliminate another 60 instructions from smg2000 on PPC (probably significantly more on X86). A common old-new diff looks like this: stw r2, 3304(r1) - lwz r2, 3192(r1) stw r2, 3300(r1) - lwz r2, 3192(r1) stw r2, 3296(r1) - lwz r2, 3192(r1) stw r2, 3200(r1) - lwz r2, 3192(r1) stw r2, 3196(r1) - lwz r2, 3192(r1) + or r2, r2, r2 stw r2, 3188(r1) and - lwz r31, 604(r1) - lwz r13, 604(r1) - lwz r14, 604(r1) - lwz r15, 604(r1) - lwz r16, 604(r1) - lwz r30, 604(r1) + or r31, r30, r30 + or r13, r30, r30 + or r14, r30, r30 + or r15, r30, r30 + or r16, r30, r30 + or r30, r30, r30 Removal of the R = R copies is coming next... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Fix a deficiency in the spiller that Evan noticed. In particular, considerChris Lattner
this code: store [stack slot #0], R10 = add R14, [stack slot #0] The spiller didn't know that the store made the value of [stackslot#0] available in R10 *IF* the store came from a copy instruction with the store folded into it. This patch teaches VirtRegMap to look at these stores and recognize the values they make available. In one case Evan provided, this code: divsd %XMM0, %XMM1 movsd %XMM1, QWORD PTR [%ESP + 40] 1) movsd QWORD PTR [%ESP + 48], %XMM1 2) movsd %XMM1, QWORD PTR [%ESP + 48] addsd %XMM1, %XMM0 3) movsd QWORD PTR [%ESP + 48], %XMM1 movsd QWORD PTR [%ESP + 4], %XMM0 turns into: divsd %XMM0, %XMM1 movsd %XMM1, QWORD PTR [%ESP + 40] addsd %XMM1, %XMM0 3) movsd QWORD PTR [%ESP + 48], %XMM1 movsd QWORD PTR [%ESP + 4], %XMM0 In this case, instruction #2 was removed because of the value made available by #1, and inst #1 was later deleted because it is now never used before the stack slot is redefined by #3. This occurs here and there in a lot of code with high spilling, on PPC most of the removed loads/stores are LSU-reject-causing loads, which is nice. On X86, things are much better (because it spills more), where we nuke about 1% of the instructions from SMG2000 and several hundred from eon. More improvements to come... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ↵Chris Lattner
more logical place. Other methods should also be moved if anyoneis interested. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Turn any_extend nodes into zero_extend nodes when it allows us to remove anChris Lattner
and instruction. This allows us to compile stuff like this: bool %X(int %X) { %Y = add int %X, 14 %Z = setne int %Y, 12345 ret bool %Z } to this: _X: cmpl $12331, 4(%esp) setne %al movzbl %al, %eax ret instead of this: _X: cmpl $12331, 4(%esp) setne %al movzbl %al, %eax andl $1, %eax ret This occurs quite a bit with the X86 backend. For example, 25 times in lambda, 30 times in 177.mesa, 14 times in galgel, 70 times in fma3d, 25 times in vpr, several hundred times in gcc, ~45 times in crafty, ~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap, 16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K programs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25901 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Implement MaskedValueIsZero for ANY_EXTEND nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02add two dag combines:Chris Lattner
(C1-X) == C2 --> X == C1-C2 (X+C1) == C2 --> X == C2-C1 This allows us to compile this: bool %X(int %X) { %Y = add int %X, 14 %Z = setne int %Y, 12345 ret bool %Z } into this: _X: cmpl $12331, 4(%esp) setne %al movzbl %al, %eax andl $1, %eax ret not this: _X: movl $14, %eax addl 4(%esp), %eax cmpl $12345, %eax setne %al movzbl %al, %eax andl $1, %eax ret Testcase here: Regression/CodeGen/X86/compare-add.ll nukage of the and coming up next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02make -debug output less newlineyChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Implement matching constraints. We can now say things like this:Chris Lattner
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4) and get: xyz r2, r3, r4, r2 note that the r2's are pinned together. Yaay for 2-address instructions. 2342 ---------------------------------------------------------------------- git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01Implement smart printing of inline asm strings, handling variants andChris Lattner
substituted operands. For this testcase: int %test(int %A, int %B) { %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B) ret int %C } we now emit: _test: or r2, r3, r3 or r3, r4, r4 xyz r2, r2, r3 ;; look here or r3, r2, r2 blr ... note the substituted operands. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25886 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01*** empty log message ***Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01Implement simple register assignment for inline asms. This allows us to ↵Chris Lattner
compile: int %test(int %A, int %B) { %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B) ret int %C } into: (0x8906130, LLVM BB @0x8902220): %r2 = OR4 %r3, %r3 %r3 = OR4 %r4, %r4 INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3 %r3 = OR4 %r2, %r2 BLR which asmprints as: _test: or r2, r3, r3 or r3, r4, r4 xyz $0, $1, $2 ;; need to print the operands now :) or r3, r2, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01Fix some of the stuff in the PPC README file, and clean up legalizationNate Begeman
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01Beef up the interface to inline asm constraint parsing, making it more ↵Chris Lattner
general, useful, and easier to use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-05-09 06:18:33 +0000