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2006-03-05Add some simple copysign foldsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26543 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05Codegen copysign[f] into a FCOPYSIGN nodeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26542 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-04fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2)Chris Lattner
fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2) This allows us to compile CodeGen/PowerPC/addi-reassoc.ll into: _test1: slwi r2, r4, 4 add r2, r2, r3 lwz r3, 36(r2) blr _test2: mulli r2, r4, 5 add r2, r2, r3 lbz r2, 11(r2) extsb r3, r2 blr instead of: _test1: addi r2, r4, 2 slwi r2, r2, 4 add r2, r3, r2 lwz r3, 4(r2) blr _test2: addi r2, r4, 2 mulli r2, r2, 5 add r2, r3, r2 lbz r2, 1(r2) extsb r3, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26535 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Added support for dwarf block data entries.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26509 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Adding basic structure support.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26505 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26504 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Number of NodeTypes now exceeds 128.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26503 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03SDOperand::isOperand should not be a forwarding. It must check *this against ↵Evan Cheng
N's operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26502 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Added isOperand(N): true if this is an operand of NEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26501 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03A bit more tweakingEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26500 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Fix VC++ compilation errors.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26498 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Move #include "llvm/CodeGen/AsmPrinter.h" to top since it's the interface.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26493 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03remove the read/write port/io intrinsics.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolvingChris Lattner
PR709, and paving the way for future progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26476 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-02- Fixed some priority calculation bugs that were causing bug 478. Among them:Evan Cheng
a predecessor appearing more than once in the operand list was counted as multiple predecessor; priority1 should be updated during scheduling; CycleBound was updated after the node is inserted into priority queue; one of the tie breaking condition was flipped. - Take into consideration of two address opcodes. If a predecessor is a def&use operand, it should have a higher priority. - Scheduler should also favor floaters, i.e. nodes that do not have real predecessors such as MOV32ri. - The scheduling fixes / tweaks fixed bug 478: .text .align 4 .globl _f _f: movl 4(%esp), %eax movl 8(%esp), %ecx movl %eax, %edx imull %ecx, %edx imull %eax, %eax imull %ecx, %ecx addl %eax, %ecx leal (%ecx,%edx,2), %eax ret It is also a slight performance win (1% - 3%) for most tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26470 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Support for enumerations.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26466 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Don't print llvm constant in assmebly file. Assembler won't like comments thatEvan Cheng
span multiple lines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loopChris Lattner
in the dag combiner on 176.gcc on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26459 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Switch back to using actual dwarf tags. Simplifies code without loss to otherJim Laskey
debug forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26455 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Fix a typo evan noticedChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26454 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Use context and not compile unit.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26453 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01I guess I can handle large type sizes.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26452 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Basic array support.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26451 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Add support for target-specific dag combinesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26443 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Add interfaces for targets to provide target-specific dag combiner ↵Chris Lattner
optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Add a new AddToWorkList method, start using itChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26441 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Pull shifts by a constant through multiplies (a form of reassociation),Chris Lattner
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26440 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01Vector ops lowering.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01- Added VConstant as an abstract version of ConstantVec.Evan Cheng
- All abstrct vector nodes must have # of elements and element type as their first two operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26432 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28Add const, volatile, restrict support.Jim Laskey
Add array of debug descriptor support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26428 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28Compile:Chris Lattner
unsigned foo4(unsigned short *P) { return *P & 255; } unsigned foo5(short *P) { return *P & 255; } to: _foo4: lbz r3,1(r3) blr _foo5: lbz r3,1(r3) blr not: _foo4: lhz r2, 0(r3) rlwinm r3, r2, 0, 24, 31 blr _foo5: lhz r2, 0(r3) rlwinm r3, r2, 0, 24, 31 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26419 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28Fold "and (LOAD P), 255" -> zextload. This allows us to compile:Chris Lattner
unsigned foo3(unsigned *P) { return *P & 255; } as: _foo3: lbz r3, 3(r3) blr instead of: _foo3: lwz r2, 0(r3) rlwinm r3, r2, 0, 24, 31 blr and: unsigned short foo2(float a) { return a; } as: _foo2: fctiwz f0, f1 stfd f0, -8(r1) lhz r3, -2(r1) blr instead of: _foo2: fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) rlwinm r3, r2, 0, 16, 31 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26417 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28fold (sra (sra x, c1), c2) -> (sra x, c1+c2)Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26416 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Add support for output memory constraints.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Qualify dwarf namespace inside llvm namespace.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26409 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Partial enabling of functions.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26404 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Supporting multiple compile units.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26402 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Re-orging file.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26401 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Implement bit propagation through sub nodes, this (re)implementsChris Lattner
PowerPC/div-2.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27remove some completed notesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Check RHS simplification before LHS simplification to avoid infinitely loopingChris Lattner
on PowerPC/small-arguments.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27Just like we use the RHS of an AND to simplify the LHS, use the LHS toChris Lattner
simplify the RHS. This allows for the elimination of many thousands of ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2 into this: _test2: srwi r2, r3, 1 xori r3, r2, 40961 blr instead of this: _test2: rlwinm r2, r3, 31, 17, 31 xori r2, r2, 40961 rlwinm r3, r2, 0, 16, 31 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26Add a bunch of missed cases. Perhaps the most significant of which is thatChris Lattner
assertzext produces zero bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26Print ConstantPoolSDNode offset field.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Added an offset field to ConstantPoolSDNode.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Fix a bug that Evan exposed with some changes he's making, and that wasChris Lattner
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc). When reloading a reused reg, make sure to invalidate the reloaded reg, and check to see if there are any other pending uses of the same register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Remove debugging printout :)Chris Lattner
Add a minor compile time win, no codegen change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Refactor some code from being inline to being out in a new class with methods.Chris Lattner
This gets rid of two gotos, which is always nice, and also adds some comments. No functionality change, this is just a refactor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24Use the PrintAsmMemoryOperand to print addressing modes.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24Pass all the flags to the asm printer, not just the # operands.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
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