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2005-04-13Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodesChris Lattner
instead. OVerall, this increases the amount of folding we can do. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21265 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Fold shift x, [sz]ext(y) -> shift x, yNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21262 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Fold shift by size larger than type size to undefNate Begeman
Make llvm undef values generate ISD::UNDEF nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12promote extload i1 -> extload i8Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21258 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Remove some redundant checks, add a couple of new ones. This allows us toChris Lattner
compile this: int foo (unsigned long a, unsigned long long g) { return a >= g; } To: foo: movl 8(%esp), %eax cmpl %eax, 4(%esp) setae %al cmpl $0, 12(%esp) sete %cl andb %al, %cl movzbl %cl, %eax ret instead of: foo: movl 8(%esp), %eax cmpl %eax, 4(%esp) setae %al movzbw %al, %cx movl 12(%esp), %edx cmpl $0, %edx sete %al movzbw %al, %ax cmpl $0, %edx cmove %cx, %ax movzbl %al, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21244 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Emit comparisons against the sign bit better. Codegen this:Chris Lattner
bool %test1(long %X) { %A = setlt long %X, 0 ret bool %A } like this: test1: cmpl $0, 8(%esp) setl %al movzbl %al, %eax ret instead of: test1: movl 8(%esp), %ecx cmpl $0, %ecx setl %al movzbw %al, %ax cmpl $0, 4(%esp) setb %dl movzbw %dl, %dx cmpl $0, %ecx cmove %dx, %ax movzbl %al, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21243 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Emit long comparison against -1 better. Instead of this (x86):Chris Lattner
test2: movl 8(%esp), %eax notl %eax movl 4(%esp), %ecx notl %ecx orl %eax, %ecx cmpl $0, %ecx sete %al movzbl %al, %eax ret or this (PPC): _test2: nor r2, r4, r4 nor r3, r3, r3 or r2, r2, r3 cntlzw r2, r2 srwi r3, r2, 5 blr Emit this: test2: movl 8(%esp), %eax andl 4(%esp), %eax cmpl $-1, %eax sete %al movzbl %al, %eax ret or this: _test2: .LBB_test2_0: ; and r2, r4, r3 cmpwi cr0, r2, -1 li r3, 1 li r2, 0 beq .LBB_test2_2 ; .LBB_test2_1: ; or r3, r2, r2 .LBB_test2_2: ; blr it seems like the PPC isel could do better for R32 == -1 case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21242 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12canonicalize x <u 1 -> x == 0. On this testcase:Chris Lattner
unsigned long long g; unsigned long foo (unsigned long a) { return (a >= g) ? 1 : 0; } It changes the ppc code from: _foo: .LBB_foo_0: ; entry mflr r11 stw r11, 8(r1) bl "L00000$pb" "L00000$pb": mflr r2 addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb") lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2) lwz r4, 0(r2) lwz r2, 4(r2) cmplw cr0, r3, r2 li r2, 1 li r3, 0 bge .LBB_foo_2 ; entry .LBB_foo_1: ; entry or r2, r3, r3 .LBB_foo_2: ; entry cmplwi cr0, r4, 1 li r3, 1 li r5, 0 blt .LBB_foo_4 ; entry .LBB_foo_3: ; entry or r3, r5, r5 .LBB_foo_4: ; entry cmpwi cr0, r4, 0 beq .LBB_foo_6 ; entry .LBB_foo_5: ; entry or r2, r3, r3 .LBB_foo_6: ; entry rlwinm r3, r2, 0, 31, 31 lwz r11, 8(r1) mtlr r11 blr to: _foo: .LBB_foo_0: ; entry mflr r11 stw r11, 8(r1) bl "L00000$pb" "L00000$pb": mflr r2 addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb") lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2) lwz r4, 0(r2) lwz r2, 4(r2) cmplw cr0, r3, r2 li r2, 1 li r3, 0 bge .LBB_foo_2 ; entry .LBB_foo_1: ; entry or r2, r3, r3 .LBB_foo_2: ; entry cntlzw r3, r4 srwi r3, r3, 5 cmpwi cr0, r4, 0 beq .LBB_foo_4 ; entry .LBB_foo_3: ; entry or r2, r3, r3 .LBB_foo_4: ; entry rlwinm r3, r2, 0, 31, 31 lwz r11, 8(r1) mtlr r11 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21241 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Teach the dag mechanism that this:Chris Lattner
long long test2(unsigned A, unsigned B) { return ((unsigned long long)A << 32) + B; } is equivalent to this: long long test1(unsigned A, unsigned B) { return ((unsigned long long)A << 32) | B; } Now they are both codegen'd to this on ppc: _test2: blr or this on x86: test2: movl 4(%esp), %edx movl 8(%esp), %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21231 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Fix expansion of shifts by exactly NVT bits on arch's (like X86) that haveChris Lattner
masking shifts. This fixes the miscompilation of this: long long test1(unsigned A, unsigned B) { return ((unsigned long long)A << 32) | B; } into this: test1: movl 4(%esp), %edx movl %edx, %eax orl 8(%esp), %eax ret allowing us to generate this instead: test1: movl 4(%esp), %edx movl 8(%esp), %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21230 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11Fix libcall code to not pass a NULL Chain to LowerCallToNate Begeman
Fix libcall code to not crash or assert looking for an ADJCALLSTACKUP node when it is known that there is no ADJCALLSTACKDOWN to match. Expand i64 multiply when ISD::MULHU is legal for the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21214 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Don't bother sign/zext_inreg'ing the result of an and operation if we knowChris Lattner
the result does change as a result of the extend. This improves codegen for Alpha on this testcase: int %a(ushort* %i) { %tmp.1 = load ushort* %i %tmp.2 = cast ushort %tmp.1 to int %tmp.4 = and int %tmp.2, 1 ret int %tmp.4 } Generating: a: ldgp $29, 0($27) ldwu $0,0($16) and $0,1,$0 ret $31,($26),1 instead of: a: ldgp $29, 0($27) ldwu $0,0($16) and $0,1,$0 addl $0,0,$0 ret $31,($26),1 btw, alpha really should switch to livein/outs for args :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21213 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21212 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10don't zextload fp values!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21209 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Until we have a dag combiner, promote using zextload's instead of extloads.Chris Lattner
This gives the optimizer a bit of information about the top-part of the value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21205 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Fold zext_inreg(zextload), likewise for sext'sChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21204 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10add a simple xformChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21203 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Fix a thinko. If the operand is promoted, pass the promoted value intoChris Lattner
the new zero extend, not the original operand. This fixes cast bool -> long on ppc. Add an unrelated fixme git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21196 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09add a little peephole optimization. This allows us to codegen:Chris Lattner
int a(short i) { return i & 1; } as _a: andi. r3, r3, 1 blr instead of: _a: rlwinm r2, r3, 0, 16, 31 andi. r3, r2, 1 blr on ppc. It should also help the other risc targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21189 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09there is no need to remove this instruction, linscan does it already as itChris Lattner
removes noop moves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21183 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09Adjust live intervals to support a livein setChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21182 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09Consider the livein/out set for a function, allowing targets to not have toChris Lattner
use ugly imp_def/imp_uses for arguments and return values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21180 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09recognize some patterns as fabs operations, so that fabs at the source levelChris Lattner
is deconstructed then reconstructed here. This catches 19 fabs's in 177.mesa 9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of specfp2000. This allows the X86 code generator to make MUCH better code than before for each of these and saves one instr on ppc. This depends on the previous CFE patch to expose these correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21171 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09Emit BRCONDTWOWAY when possible.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21167 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21166 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09print and fold BRCONDTWOWAY correctlyChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21165 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09canonicalize a bunch of operations involving fnegChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21160 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07If a target zero or sign extends the result of its setcc, allow folding ofChris Lattner
this into sign/zero extension instructions later. On PPC, for example, this testcase: %G = external global sbyte implementation void %test(int %X, int %Y) { %C = setlt int %X, %Y %D = cast bool %C to sbyte store sbyte %D, sbyte* %G ret void } Now codegens to: cmpw cr0, r3, r4 li r3, 1 li r4, 0 blt .LBB_test_2 ; .LBB_test_1: ; or r3, r4, r4 .LBB_test_2: ; addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb") lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2) stb r3, 0(r2) instead of: cmpw cr0, r3, r4 li r3, 1 li r4, 0 blt .LBB_test_2 ; .LBB_test_1: ; or r3, r4, r4 .LBB_test_2: ; *** rlwinm r3, r3, 0, 31, 31 addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb") lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2) stb r3, 0(r2) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21148 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07Remove somethign I had for testingChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21144 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07This patch does two things. First, it canonicalizes 'X >= C' -> 'X > C-1'Chris Lattner
(likewise for <= >=u >=u). Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0' On powerpc, for example, this changes this: lis r2, 32767 ori r2, r2, 65535 cmplw cr0, r3, r2 bgt .LBB_test_2 into: cmpwi cr0, r3, 0 blt .LBB_test_2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21142 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07Fix a really scary bug that Nate found where we weren't deleting the rightChris Lattner
elements auto of the autoCSE maps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21128 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06Teach ExpandShift how to handle shifts by a constant. This allows targetsNate Begeman
like PowerPC to codegen long shifts in many fewer instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21122 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06Expand SREM and UREM for targets that claim not to have them, like PowerPCNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21103 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64bNate Begeman
multiply. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21102 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04Make sure to notice that explicit physregs are used in the functionChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21084 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04Handle expanding arguments to ISD::TRUNCATE. This happens on PowerPC whenNate Begeman
you have something like i16 = truncate i64. This fixes Regression/C/casts git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21073 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03Fix sign_extend and zero_extend of promoted value types to expanded valueChris Lattner
types. This occurs when casting short to long on PPC for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21072 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02add support for prefix/suffix strings to go around GlobalValue(s)Duraid Madina
(which may or be function pointers) in the asmprinter. For the moment, this changes nothing, except the IA64 backend which can use this to write: data8.ua @fptr(blah__blah__mangled_function_name) (by setting FunctionAddrPrefix/Suffix to "@fptr(" / ")") git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21024 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02transform fabs/fabsf calls into FABS nodes.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21014 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Expand fabs into fnegChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21013 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Turn -0.0 - X -> fnegChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21011 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Several changes mixed up here. First when legalizing a DAG with pcmarker,Chris Lattner
dont' regen the whole dag if unneccesary. Second, fix and ugly bug with the _PARTS nodes that caused legalize to produce multiples of them. Finally, implement initial support for FABS and FNEG. Currently FNEG is the only one to be trusted though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21009 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02print fneg/fabsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21008 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02fix some bugs in the implementation of SHL_PARTS and friends.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21004 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Turn expanded shift operations into (e.g.) SHL_PARTS if the target supports it.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21002 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Print some new nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21001 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Fix a bug when inserting a libcall into a function with no other calls.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20999 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02Fix a warning about an unhandled switch caseNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20994 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01Add ISD::UNDEF nodeNate Begeman
Teach the SelectionDAG code how to expand and promote it Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp arguments, but not shadowing their value. This allows us to do the right thing with both fixed and vararg floating point arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01print the machine CFG in the -print-machineinstrs dumpChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20976 91177308-0d34-0410-b5e6-96231b3b80d8
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