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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119482 91177308-0d34-0410-b5e6-96231b3b80d8
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operands in a variadic instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119446 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119386 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119385 91177308-0d34-0410-b5e6-96231b3b80d8
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easier to debug, and to avoid complications when the CFG changes
in the middle of the instruction selection process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119382 91177308-0d34-0410-b5e6-96231b3b80d8
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Always spill the full representative register at any point where any subregister
is live.
This fixes PR8620 which caused the old logic to get confused and not spill
anything at all.
The fundamental problem here is that the coalescer is too aggressive about
physical register coalescing. It sometimes makes it impossible to allocate
registers without these emergency spills.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119375 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119374 91177308-0d34-0410-b5e6-96231b3b80d8
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(and likely) wrong about anyhow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119320 91177308-0d34-0410-b5e6-96231b3b80d8
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Use amazing new function call technology instead of writing identical code in
multiple places.
This fixes PR8604.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119306 91177308-0d34-0410-b5e6-96231b3b80d8
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The live range of a register defined by an early clobber starts at the use slot,
not the def slot.
Except when it is an early clobber tied to a use operand. Then it starts at the
def slot like a standard def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119305 91177308-0d34-0410-b5e6-96231b3b80d8
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This reverts r119183 which borke the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119270 91177308-0d34-0410-b5e6-96231b3b80d8
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iterator, not TII->OptimizeCompareInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119186 91177308-0d34-0410-b5e6-96231b3b80d8
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The live range of a register defined by an early clobber starts at the use slot,
not the def slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119183 91177308-0d34-0410-b5e6-96231b3b80d8
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live ranges for the spill register are also defined at the use slot instead of
the normal def slot.
This fixes PR8612 for the inline spiller. A use was being allocated to the same
register as a spilled early clobber def.
This problem exists in all the spillers. A fix for the standard spiller is
forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119182 91177308-0d34-0410-b5e6-96231b3b80d8
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out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
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since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119089 91177308-0d34-0410-b5e6-96231b3b80d8
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location entries support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118940 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118913 91177308-0d34-0410-b5e6-96231b3b80d8
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catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118904 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118896 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118883 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118803 91177308-0d34-0410-b5e6-96231b3b80d8
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it makes no sense for allocation_order iterators to visit reserved regs.
The inline spiller depends on AliasAnalysis.
Manage the Query state to avoid uninitialized or stale results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118800 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118789 91177308-0d34-0410-b5e6-96231b3b80d8
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superceded by SplitKit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118754 91177308-0d34-0410-b5e6-96231b3b80d8
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This is the first small step towards using closed intervals for liveness instead
of the half-open intervals we're using now.
We want to be able to distinguish between a SlotIndex that represents a variable
being live-out of a basic block, and an index representing a variable live-in to
its successor.
That requires two separate indexes between blocks. One for live-outs and one for
live-ins.
With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays
greater than any instructions inserted at the end of MBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118747 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118742 91177308-0d34-0410-b5e6-96231b3b80d8
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constant loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118741 91177308-0d34-0410-b5e6-96231b3b80d8
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function specific local variable's info.
This fixes radar 8653152. I am checking in testcase as a separate check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118726 91177308-0d34-0410-b5e6-96231b3b80d8
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Whenever splitting wants to insert a copy, it checks if the value can be
rematerialized cheaply instead.
Missing features:
- Delete instructions when all uses have been rematerialized.
- Truncate live ranges to the remaining uses after rematerialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118702 91177308-0d34-0410-b5e6-96231b3b80d8
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benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118701 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118661 91177308-0d34-0410-b5e6-96231b3b80d8
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earlier. Implicit bool -> int conversions are evil!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118651 91177308-0d34-0410-b5e6-96231b3b80d8
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(retry now that the windows build is green)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118630 91177308-0d34-0410-b5e6-96231b3b80d8
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-Wnon-virtual-dtor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118616 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118613 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118604 91177308-0d34-0410-b5e6-96231b3b80d8
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in order to fold it into a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8
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{i64, i64} from matching i128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118465 91177308-0d34-0410-b5e6-96231b3b80d8
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handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118423 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118394 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118342 91177308-0d34-0410-b5e6-96231b3b80d8
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be used
to perform the copy, which may be of lots of memory [*]. It would be good if the
fall-back code generated something reasonable, i.e. did the copy in a loop, rather
than vast numbers of loads and stores. Add a note about this. Currently target
specific code seems to always kick in so this is more of a theoretical issue rather
than a practical one now that X86 has been fixed.
[*] It's amazing how often people pass mega-byte long arrays by copy...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118275 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118254 91177308-0d34-0410-b5e6-96231b3b80d8
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they do :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118250 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118249 91177308-0d34-0410-b5e6-96231b3b80d8
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and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118245 91177308-0d34-0410-b5e6-96231b3b80d8
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This way, InlineSpiller does the same amount of splitting as the standard
spiller. Splitting should really be guided by the register allocator, and
doesn't belong in the spiller at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118216 91177308-0d34-0410-b5e6-96231b3b80d8
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just do it earlier too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
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splitting needs them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118194 91177308-0d34-0410-b5e6-96231b3b80d8
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