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2010-12-20MachineVerifier should count landing pad successors as basic blocks rather thanCameron Zwarich
out-edges. Fixes PR8824. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20Teach MachineVerifier that early clobber defs begin at USE slots and other defsCameron Zwarich
begin at DEF slots. Fixes the second half of PR8813. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20Add a missing check from r122218.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20implement type legalization promotion support for SMULO and UMULO, giving Chris Lattner
ARM (and other 32-bit-only) targets support for i8 and i16 overflow multiplies. The generated code isn't great, but this at least fixes CodeGen/Generic/overflow.ll when running on ARM hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20Don't assume that an instruction ending a register's live range always readsCameron Zwarich
the register; it may be a dead def instead. Fixes PR8820. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122218 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20Fix a bug in the scheduler's handling of "unspillable" vregs.Chris Lattner
Imagine we see: EFLAGS = inst1 EFLAGS = inst2 FLAGS gpr = inst3 EFLAGS Previously, we would refuse to schedule inst2 because it clobbers the EFLAGS of the predecessor. However, it also uses the EFLAGS of the predecessor, so it is safe to emit. SDep edges ensure that the right order happens already anyway. This fixes 2 testsuite crashes with the X86 patch I'm going to commit next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122211 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20the result of CheckForLiveRegDef is dead, remove it.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20reduce indentation, no functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20Ignore debug values when performing MachineVerifier liveness checks. FixesCameron Zwarich
PR8822. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19Early clobber operands are allowed to be defined at use indices. This fixes oneCameron Zwarich
half of PR8813. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19Fix PR8815 by checking for an explicit clobber def tied to a use operand inCameron Zwarich
ConnectedVNInfoEqClasses::Classify(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19Fix PR8811 by teaching MachineVerifier about optional defs.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19StrongPHIElimination will never run before TwoAddressInstructionPass.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19Add missing standard headers. Patch by Joerg Sonnenberger!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19teach MaskedValueIsZero how to analyze ADDE. This isChris Lattner
enough to teach it that ADDE(0,0) is known 0 except the low bit, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19Remove some checks for StrongPHIElim. These checks make it impossible to use anCameron Zwarich
alternative register allocator that does not require LiveIntervals by specifying it on the command-line for a target that has StrongPHIElimination enabled by default. These checks are pretty meaningless anyways, since StrongPHIElimination and PHIElimination are never used at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19fix PR8642: if a critical edge has a PHI value that can trap,Chris Lattner
isel is *required* to split the edge. PHI values get evaluated on the edge, not in their predecessor block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18Apparently, operandices is not a word.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122135 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18Teach the inline spiller to attempt folding a load instruction into its singleJakob Stoklund Olesen
use before rematerializing the load. This allows us to produce: addps LCPI0_1(%rip), %xmm2 Instead of: movaps LCPI0_1(%rip), %xmm3 addps %xmm3, %xmm2 Saving a register and an instruction. The standard spiller already knows how to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18Tweak debug spew.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122132 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18Check that the register is live-in to the loop header before inserting copies inJakob Stoklund Olesen
the loop predecessors. The register can be live-out from a predecessor without being live-in to the loop header if there is a critical edge from the predecessor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18Fix GCC warning:Nick Lewycky
lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18Pass a Banner argument to the machine code verifier both fromJakob Stoklund Olesen
createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Avoid dereferencing end() in collectInterferingVRegs() when there is noJakob Stoklund Olesen
interference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Make the -verify-regalloc command line option available to base classes asJakob Stoklund Olesen
RegAllocBase::VerifyEnabled. Run the machine code verifier in a few interesting places during RegAllocGreedy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122107 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Enable loop splitting in RegAllocGreedy.Jakob Stoklund Olesen
The heuristics split around the largest loop where the current register may be allocated without interference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122106 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17During local stack slot allocation, the materializeFrameBaseRegister functionBill Wendling
may be called. If the entry block is empty, the insertion point iterator will be the "end()" value. Calling ->getParent() on it (among others) causes problems. Modify materializeFrameBaseRegister to take the machine basic block and insert the frame base register at the beginning of that block. (It's very similar to what the code does all ready. The only difference is that it will always insert at the beginning of the entry block instead of after a previous materialization of the frame base register. I doubt that that matters here.) <rdar://problem/8782198> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Fix a DAGCombiner crash when folding binary vector operations with constantBob Wilson
BUILD_VECTOR operands where the element type is not legal. I had previously changed this code to insert TRUNCATE operations, but that was just wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Add a transform to DAG Combiner. This improves theDale Johannesen
code for the case where 32-bit divide by constant is turned into 64-bit multiply by constant. 8771012. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Allow missing kill flags on an untied operand of a two-address instruction whenJakob Stoklund Olesen
the operand uses the same register as a tied operand: %r1 = add %r1, %r1 If add were a three-address instruction, kill flags would be required on at least one of the uses. Since it is a two-address instruction, the tied use operand must not have a kill flag. This change makes the kill flag on the untied use operand optional. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Add MachineLoopRange comparators for sorting loop lists by number and by area.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Provide LiveIntervalUnion::Query::checkLoopInterference.Jakob Stoklund Olesen
This is a three-way interval list intersection between a virtual register, a live interval union, and a loop. It will be used to identify interference-free loops for live range splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.Bob Wilson
Radar 8776599 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122018 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Fix a comment typo.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122016 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16MC: Make TargetAsmBackend available to the AsmStreamer.Daniel Dunbar
- Treaty talks on the non-proliferation of MC objects broke down. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Start using SplitKit and MachineLoopRanges in RegAllocGreedy in preparation ofJakob Stoklund Olesen
live range splitting around loops guided by register pressure. So far, trySplit() simply prints a lot of debug output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Add MachineLoopRanges analysis.Jakob Stoklund Olesen
A MachineLoopRange contains the intervals of slot indexes covered by the blocks in a loop. This representation of the loop blocks is more efficient to compare against interfering registers during register coalescing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Teach machine cse to commute instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Move Value::getUnderlyingObject to be a standaloneDan Gohman
function so that it can live in Analysis instead of VMCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Fix build.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121872 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Detect and enumerate bypass loops.Jakob Stoklund Olesen
Bypass loops have the current live range live through, but contain no uses or defs. Splitting around a bypass loop can free registers for other uses inside the loop by spilling the split range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121871 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Separate SplitAnalysis::getSplitLoops().Jakob Stoklund Olesen
This method returns the set of loops with uses that are candidates for splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15take care of some todos, transforming [us]mul_lohi into Chris Lattner
a wider mul if the wider mul is legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121848 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15when transforming a MULHS into a wider MUL, there is no need to SRA theChris Lattner
result, the top bits are truncated off anyway, just use SRL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Simplify RegAllocGreedy's use of register aliases.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121807 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Simplify CCState's use of register aliases.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Simplify AggressiveAntiDepBreaker's use of register aliases.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121805 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Fix a minor bug in two-address pass. It was missing a commute opportunity.Evan Cheng
regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14Move debugging code entirely within DEBUG(). Silences an unused variableMatt Beaumont-Gay
warning in the opt build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121791 91177308-0d34-0410-b5e6-96231b3b80d8
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