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2013-02-19Prune AsmParser (target and generic).Jan Voung
This is for the sandboxed llvm translator. Rough estimate, from companion test: https://codereview.chromium.org/12218141/ """ Pruned out approx 35099 bytes worth of MCAsmParser symbols Pruned out approx 49935 bytes worth of ::AsmParser symbols Pruned out approx 183308 bytes worth of ARMAsmParser symbols Pruned out approx 54552 bytes worth of X86AsmParser symbols Pruned out approx 11415 bytes worth of ELFAsmParser symbols Pruned out approx 7253 bytes worth of COFFAsmParser symbols Pruned out approx 18450 bytes worth of DarwinAsmParser symbols Pruned out approx 403 bytes worth of MCAsmLexer symbols Pruned out approx 7009 bytes worth of ::AsmLexer symbols Pruned out approx 359436 bytes worth of MatchTable symbols """ BUG= https://code.google.com/p/nativeclient/issues/detail?id=1222 Review URL: https://codereview.chromium.org/12218139
2013-01-31Cherry-pick r174067Derek Schuff
2013-01-30Merge commit 'a662a9862501fc86904e90054f7c1519101d9126'Derek Schuff
Conflicts: include/llvm/CodeGen/IntrinsicLowering.h include/llvm/MC/MCAssembler.h include/llvm/MC/MCObjectStreamer.h lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/MC/MCParser/AsmParser.cpp lib/MC/MCPureStreamer.cpp lib/MC/WinCOFFStreamer.cpp lib/Makefile lib/Support/Unix/Memory.inc lib/Support/Unix/Process.inc lib/Support/Unix/Program.inc lib/Target/ARM/ARM.h lib/Target/ARM/ARMFastISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/X86/CMakeLists.txt lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86TargetMachine.cpp lib/Target/X86/X86TargetObjectFile.cpp lib/Transforms/InstCombine/InstCombineCalls.cpp test/CodeGen/X86/fast-isel-x86-64.ll tools/llc/llc.cpp tools/lto/LTOModule.cpp utils/TableGen/EDEmitter.cpp
2013-01-14This patch addresses an incorrect transformation in the DAG combiner.Bill Schmidt
The included test case is derived from one of the GCC compatibility tests. The problem arises after the selection DAG has been converted to type-legalized form. The combiner first sees a 64-bit load that can be converted into a pre-increment form. The original load feeds into a SRL that isolates the upper 32 bits of the loaded doubleword. This looks like an opportunity for DAGCombiner::ReduceLoadWidth() to replace the 64-bit load with a 32-bit load. However, this transformation is not valid, as the replacement load is not a pre-increment load. The pre-increment load produces an extra result, which feeds a subsequent add instruction. The replacement load only has one result value, and this value is propagated to all uses of the pre- increment load, including the add. Because the add is looking for the second result value as its operand, it ends up attempting to add a constant to a token chain, resulting in a crash. So the patch simply disables this transformation for any load with more than two result values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172480 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12When lowering an inreg sext first shift left, then right arithmetically.Benjamin Kramer
Shifting right two times will only yield zero. Should fix SingleSource/UnitTests/SignlessTypes/factor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12Limit the search space in RAGreedy::tryEvict().Jakob Stoklund Olesen
When tryEvict() is looking for a cheaper register in the allocation order, skip the tail of too expensive registers when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172281 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12Precompute some information about register costs.Jakob Stoklund Olesen
Remember the minimum cost of the registers in an allocation order and the number of registers at the end of the allocation order that have the same cost per use. This information can be used to limit the search space for RAGreedy::tryEvict() when looking for a cheaper register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172280 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11PPC: Implement efficient lowering of sign_extend_inreg.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172269 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11Merge commit '1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410'Derek Schuff
deplib features commented out due to removal upstream; will add back as a localmod Conflicts: include/llvm/ADT/Triple.h include/llvm/MC/MCAssembler.h include/llvm/Target/TargetFrameLowering.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/CodeGen/BranchFolding.cpp lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/Makefile lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMFrameLowering.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMSubtarget.h lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsInstrInfo.td lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86Subtarget.h lib/VMCore/Module.cpp test/MC/MachO/ARM/nop-armv4-padding.s tools/Makefile tools/llc/llc.cpp tools/lto/LTOModule.cpp tools/lto/lto.cpp
2013-01-11Remove some accidentaly duplicated code. This needs urgent cleanup :(Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172248 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11Split TargetLowering into a CodeGen and a SelectionDAG part.Benjamin Kramer
This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still a complete mess but as long as the edges consist of virtual call it doesn't cause breakage. BasicTTI did static calls and thus broke some build configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172246 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11ARM Cost Model: Modify the target independent cost model to askNadav Rotem
the target if it supports the different CAST types. We didn't do this on X86 because of the different register sizes and types, but on ARM this makes sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172245 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11For inline asm:Eric Christopher
- recognize string "{memory}" in the MI generation - mark as mayload/maystore when there's a memory clobber constraint. PR14859. Patch by Krzysztof Parzyszek git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172228 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11Follow-up typo correction from building the wrong branch.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11Fix typo from r170452. Affects -enable-misched heuristics.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-11Simplify writing floating types to assembly.Tim Northover
This removes previous special cases for each floating-point type in favour of a shared codepath. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-10PR14896: Handle memcpy from constant string where the memcpy size is larger ↵Evan Cheng
than the string size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172124 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-10Remove unneeded includes from FunctionLoweringInfo.h.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-10Allow hasProperty() to be called on bundle-internal instructions.Jakob Stoklund Olesen
When calling hasProperty() on an instruction inside a bundle, it should always behave as if IgnoreBundle was passed, and just return properties for the current instruction. Only attempt to aggregate bundle properties whan asked about the bundle header. The assertion fires on existing ARM test cases without this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172082 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-10Support headerless bundles in MachineInstr::hasProperty().Jakob Stoklund Olesen
This function can still work without a BUNDLE header instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172029 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-10Stack Alignment: throw error if we can't satisfy the minimal alignmentManman Ren
requirement when creating stack objects in MachineFrameInfo. Add CreateStackObjectWithMinAlign to throw error when the minimal alignment can't be achieved and to clamp the alignment when the preferred alignment can't be achieved. Same is true for CreateVariableSizedObject. Will not emit error in CreateSpillStackObject or CreateStackObject. As long as callers of CreateStackObject do not assume the object will be aligned at the requested alignment, we should not have miscompile since later optimizations which look at the object's alignment will have the correct information. rdar://12713765 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172027 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09ARM Cost model: Use the size of vector registers and widest vectorizable ↵Nadav Rotem
instruction to determine the max vectorization factor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y).Evan Cheng
It cahced XOR's operands before calling visitXOR() but failed to update the operands when visitXOR changed the XOR node. rdar://12968664 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Don't print bundle flags.Jakob Stoklund Olesen
The bundle flags are used by MachineBasicBlock::print(), they don't need to clutter up individual MachineInstrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Don't require BUNDLE headers in MachineInstr::getBundleSize().Jakob Stoklund Olesen
It is possible to build MI bundles that don't begin with a BUNDLE header. Add support for such bundles, counting all instructions inside the bundle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Fix a typo in MachineInstr::unbundleFromSucc() method.Sergei Larin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Refactor to expose RTLIB calls to targets.Tim Northover
fp128 is almost but not quite completely illegal as a type on AArch64. As a result it needs to have a register class (for argument passing mainly), but all operations need to be lowered to runtime calls. Currently there's no way for targets to do this (without duplicating code), as the relevant functions are hidden in SelectionDAG. This patch changes that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Last in the series of removing unnecessary '0' arguments forEric Christopher
address space. Reordered the EmitULEB128IntValue arguments to make this easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171949 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09MIsched: add an ILP window property to machine model.Andrew Trick
This was an experimental option, but needs to be defined per-target. e.g. PPC A2 needs to aggressively hide latency. I converted some in-order scheduling tests to A2. Hal is working on more test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09These functions have default arguments of 0 for the last arg. UseEric Christopher
them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09These functions have default arguments of 0 for the last arg. UseEric Christopher
them and add one where it seemed obvious that we wanted one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-09Cost Model: Move the 'max unroll factor' variable to the TTI and add initial ↵Nadav Rotem
Cost Model support on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-08Move the string pools down into the units. No functional change.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-08Add fp128 rtlib function names to LLVMTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171867 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-08Allow the asm printer to print fp128 values properly.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-08Sink a function that refers to the SelectionDAG into that library in theChandler Carruth
one file where it is called as a static function. Nuke the declaration and the definition in lib/CodeGen, along with the include of SelectionDAG.h from this file. There is no dependency edge from lib/CodeGen to lib/CodeGen/SelectionDAG, so it isn't valid for a routine in lib/CodeGen to reference the DAG. There is a dependency from lib/CodeGen/SelectionDAG on lib/CodeGen. This breaks one violation of this layering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171842 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-08Remove the llvm-local DW_TAG_vector_type tag and add a test toEric Christopher
make sure that vector types do work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Pack MachineOperand bitfields better.Jakob Stoklund Olesen
Previously, 4 bits were unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171814 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Pack MachineInstr fields better.Jakob Stoklund Olesen
This shrinks MachineInstr to 64 bytes (from 72). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Whitespace and 80-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171803 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Add more comments to what's going on here.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171780 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Add support for separating strings for the split debug info DWARF5Eric Christopher
proposal. This leaves the strings in the skeleton die as strp, but in all dwo files they're accessed now via DW_FORM_GNU_str_index. Add support for dumping these sections and modify the fission-cu.ll testcase to have the correct strings and form. Fix a small bug in the fixed form sizes routine that involved out of array accesses for the table and add a FIXME in the extractFast routine to fix this up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Sink AddrMode back into TargetLowering, removing one of the mostChandler Carruth
peculiar headers under include/llvm. This struct still doesn't make a lot of sense, but it makes more sense down in TargetLowering than it did before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171739 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Switch the SCEV expander and LoopStrengthReduce to useChandler Carruth
TargetTransformInfo rather than TargetLowering, removing one of the primary instances of the layering violation of Transforms depending directly on Target. This is a really big deal because LSR used to be a "special" pass that could only be tested fully using llc and by looking at the full output of it. It also couldn't run with any other loop passes because it had to be created by the backend. No longer is this true. LSR is now just a normal pass and we should probably lift the creation of LSR out of lib/CodeGen/Passes.cpp and into the PassManagerBuilder. =] I've not done this, or updated all of the tests to use opt and a triple, because I suspect someone more familiar with LSR would do a better job. This change should be essentially without functional impact for normal compilations, and only change behvaior of targetless compilations. The conversion required changing all of the LSR code to refer to the TTI interfaces, which fortunately are very similar to TargetLowering's interfaces. However, it also allowed us to *always* expect to have some implementation around. I've pushed that simplification through the pass, and leveraged it to simplify code somewhat. It required some test updates for one of two things: either we used to skip some checks altogether but now we get the default "no" answer for them, or we used to have no information about the target and now we do have some. I've also started the process of removing AddrMode, as the TTI interface doesn't use it any longer. In some cases this simplifies code, and in others it adds some complexity, but I think it's not a bad tradeoff even there. Subsequent patches will try to clean this up even further and use other (more appropriate) abstractions. Yet again, almost all of the formatting changes brought to you by clang-format. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171735 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07PR14759: Debug info support for C++ member pointers.David Blaikie
This works fine with GDB for member variable pointers, but GDB's support for member function pointers seems to be quite unrelated to DW_TAG_ptr_to_member_type. (see GDB bug 14998 for details) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171698 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Move TargetTransformInfo to live under the Analysis library. This noChandler Carruth
longer would violate any dependency layering and it is in fact an analysis. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth
a TargetMachine to construct (and thus isn't always available), to an analysis group that supports layered implementations much like AliasAnalysis does. This is a pretty massive change, with a few parts that I was unable to easily separate (sorry), so I'll walk through it. The first step of this conversion was to make TargetTransformInfo an analysis group, and to sink the nonce implementations in ScalarTargetTransformInfo and VectorTargetTranformInfo into a NoTargetTransformInfo pass. This allows other passes to add a hard requirement on TTI, and assume they will always get at least on implementation. The TargetTransformInfo analysis group leverages the delegation chaining trick that AliasAnalysis uses, where the base class for the analysis group delegates to the previous analysis *pass*, allowing all but tho NoFoo analysis passes to only implement the parts of the interfaces they support. It also introduces a new trick where each pass in the group retains a pointer to the top-most pass that has been initialized. This allows passes to implement one API in terms of another API and benefit when some other pass above them in the stack has more precise results for the second API. The second step of this conversion is to create a pass that implements the TargetTransformInfo analysis using the target-independent abstractions in the code generator. This replaces the ScalarTargetTransformImpl and VectorTargetTransformImpl classes in lib/Target with a single pass in lib/CodeGen called BasicTargetTransformInfo. This class actually provides most of the TTI functionality, basing it upon the TargetLowering abstraction and other information in the target independent code generator. The third step of the conversion adds support to all TargetMachines to register custom analysis passes. This allows building those passes with access to TargetLowering or other target-specific classes, and it also allows each target to customize the set of analysis passes desired in the pass manager. The baseline LLVMTargetMachine implements this interface to add the BasicTTI pass to the pass manager, and all of the tools that want to support target-aware TTI passes call this routine on whatever target machine they end up with to add the appropriate passes. The fourth step of the conversion created target-specific TTI analysis passes for the X86 and ARM backends. These passes contain the custom logic that was previously in their extensions of the ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces. I separated them into their own file, as now all of the interface bits are private and they just expose a function to create the pass itself. Then I extended these target machines to set up a custom set of analysis passes, first adding BasicTTI as a fallback, and then adding their customized TTI implementations. The fourth step required logic that was shared between the target independent layer and the specific targets to move to a different interface, as they no longer derive from each other. As a consequence, a helper functions were added to TargetLowering representing the common logic needed both in the target implementation and the codegen implementation of the TTI pass. While technically this is the only change that could have been committed separately, it would have been a nightmare to extract. The final step of the conversion was just to delete all the old boilerplate. This got rid of the ScalarTargetTransformInfo and VectorTargetTransformInfo classes, all of the support in all of the targets for producing instances of them, and all of the support in the tools for manually constructing a pass based around them. Now that TTI is a relatively normal analysis group, two things become straightforward. First, we can sink it into lib/Analysis which is a more natural layer for it to live. Second, clients of this interface can depend on it *always* being available which will simplify their code and behavior. These (and other) simplifications will follow in subsequent commits, this one is clearly big enough. Finally, I'm very aware that much of the comments and documentation needs to be updated. As soon as I had this working, and plausibly well commented, I wanted to get it committed and in front of the build bots. I'll be doing a few passes over documentation later if it sticks. Commits to update DragonEgg and Clang will be made presently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05Funnel the actual TargetTransformInfo pass from the SelectionDAGISelChandler Carruth
pass into the SelectionDAG itself rather than snooping on the implementation of that pass as exposed by the TargetMachine. This removes the last direct client of the ScalarTargetTransformInfo class outside of the TTI pass implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171625 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05Emit DW_TAG_formal_parameter for unnamed parameters.David Blaikie
This change essentially reverts r87069 which came without a test case. It causes no regressions in the GDB 7.5 test suite & fixes 25 xfails (commit to the test suite to follow). If anyone can present a test case that demonstrates why this check is necessary I'd be happy to account for it in one way or another. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171609 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05Don't call destructors on MachineInstr and MachineOperand.Jakob Stoklund Olesen
The series of patches leading up to this one makes llc -O0 run 8% faster. When deallocating a MachineFunction, there is no need to visit all MachineInstr and MachineOperand objects to deallocate them. All their memory come from a BumpPtrAllocator that is about to be purged, and they have empty destructors anyway. This only applies when deallocating the MachineFunction. DeleteMachineInstr() should still be used to recycle MI memory during the codegen passes. Remove the LeakDetector support for MachineInstr. I've never seen it used before, and now it definitely doesn't work. With this patch, leaked MachineInstrs would be much less of a problem since all of their memory will be reclaimed by ~MachineFunction(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171599 91177308-0d34-0410-b5e6-96231b3b80d8
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