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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23041 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23027 91177308-0d34-0410-b5e6-96231b3b80d8
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Add some foldings to hopefully help the illegal setcc issue, and move some code around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23025 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23022 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23021 91177308-0d34-0410-b5e6-96231b3b80d8
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select. Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.
This allows us to compile this:
int %eq0(int %a) {
%tmp.1 = seteq int %a, 0 ; <bool> [#uses=1]
%tmp.2 = cast bool %tmp.1 to int ; <int> [#uses=1]
ret int %tmp.2
}
To this:
_eq0:
cntlzw r2, r3
srwi r3, r2, 5
blr
instead of this:
_eq0:
cntlzw r2, r3
rlwinm r3, r2, 27, 31, 31
blr
when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc). Thanks to Nate for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23013 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23012 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23010 91177308-0d34-0410-b5e6-96231b3b80d8
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nodes so that backends don't have to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22999 91177308-0d34-0410-b5e6-96231b3b80d8
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the target isel crashes due to unimplemented features like calls :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22997 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22995 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22994 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22992 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22989 91177308-0d34-0410-b5e6-96231b3b80d8
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Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting. This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now. This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.
On this program, on itanium, live intervals now takes 41% of llc time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22986 91177308-0d34-0410-b5e6-96231b3b80d8
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either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22978 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22977 91177308-0d34-0410-b5e6-96231b3b80d8
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number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers. Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these). This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).
This reduces ppc llc compile time from 184s -> 172s on kc++. This is probably
worth FAR FAR more on itanium though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22972 91177308-0d34-0410-b5e6-96231b3b80d8
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we spill out of the fast path. The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs. This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22971 91177308-0d34-0410-b5e6-96231b3b80d8
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promoted to the right type. This fixes: IA64/2005-08-22-LegalizerCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22969 91177308-0d34-0410-b5e6-96231b3b80d8
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add some comments. This loop really needs to be reevaluated!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22966 91177308-0d34-0410-b5e6-96231b3b80d8
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allowing us to compile this:
float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, 10.1
ret float %R
}
to this:
_test2:
lfs r2, 0(r3)
lis r3, ha16(.CPI_test2_0)
lfs r3, lo16(.CPI_test2_0)(r3)
fadds f1, r2, r3
blr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22955 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22949 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22948 91177308-0d34-0410-b5e6-96231b3b80d8
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the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22943 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22940 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22938 91177308-0d34-0410-b5e6-96231b3b80d8
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us to compile stuff like this:
double %test(double %A, double %B, double %C, double %E) {
%F = mul double %A, %A
%G = add double %F, %B
%H = sub double -0.0, %G
%I = mul double %H, %C
%J = add double %I, %E
ret double %J
}
to:
_test:
fnmadd f0, f1, f1, f2
fmadd f1, f0, f3, f4
blr
woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22937 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22934 91177308-0d34-0410-b5e6-96231b3b80d8
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This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933 91177308-0d34-0410-b5e6-96231b3b80d8
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temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22907 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22896 91177308-0d34-0410-b5e6-96231b3b80d8
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scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22878 91177308-0d34-0410-b5e6-96231b3b80d8
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codegen:
_empty:
.LBB_empty_0: ;
blr
but can't do anything more (yet). :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22863 91177308-0d34-0410-b5e6-96231b3b80d8
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rlwinm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22856 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22853 91177308-0d34-0410-b5e6-96231b3b80d8
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Added some class dividers in SelectionDAG.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22841 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8
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argument is not specified.
Implement ReplaceAllUsesWith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22834 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22831 91177308-0d34-0410-b5e6-96231b3b80d8
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