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2010-06-18Don't replace the old Ordering object with a new one; just clear()Dan Gohman
the old one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106284 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Don't call clear() on DbgInfo when it's going to be deleted anyway.Dan Gohman
Don't replace the old DbgInfo with a new one when clear() on the old one is sufficient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106283 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Change UpdateNodeOperands' operand and return value from SDValue toDan Gohman
SDNode *, since it doesn't care about the ResNo value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Eliminate unnecessary uses of getZExtValue().Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18isValueValidForType can be a static member function.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman
which is faster, simpler, and less surprising. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Handle ext(ext(x)) -> ext(x) immediately, since it's simple.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106256 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings
addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17add missing break. inconsequential as the code shouldn't be reached, butJim Grosbach
for correctness' sake, it should be there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Add entries for Expanding atomic intrinsics to libcalls. Just a placeholderJim Grosbach
for the moment. The implementation of the libcall will follow. Currently, the llvm-gcc knows when the intrinsics can be correctly handled by the back end and only generates them in those cases, issuing libcalls directly otherwise. That's too much coupling. The intrinsics should always be generated and the back end decide how to handle them, be it with a libcall, inline code, or whatever. This patch is a step in that direction. rdar://8097623 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17ISD::MEMBARRIER should lower to a libcall (__sync_synchronize) if the targetJim Grosbach
sets the legalize action to Expand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Allow a register to be redefined multiple times in a basic block.Jakob Stoklund Olesen
LiveVariableAnalysis was a bit picky about a register only being redefined once, but that really isn't necessary. Here is an example of chained INSERT_SUBREGs that we can handle now: 68 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14 register: %reg1040 +[70,134:0) 76 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13 register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0) 0@78-(134) 1@70-(78) 84 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12 register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0) 0@86-(134) 1@70-(78) 2@78-(86) 92 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11 register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0) 0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94) rdar://problem/8096390 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106152 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16add FIXMEJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Improve comment to include that the use of a preg is also verboten in this ↵Bill Wendling
situation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Make post-ra scheduling, anti-dep breaking, and register scavenger ↵Evan Cheng
(conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Use separate named MDNode to hold each function's local variable info.Devang Patel
This speeds up local variable handling in DwarfDebug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Don't emit the linkage for initializer label for mach-o tls.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Create a more targeted fix for not sinking instructions into a range where itBill Wendling
will conflict with another live range. The place which creates this scenerio is the code in X86 that lowers a select instruction by splitting the MBBs. This eliminates the need to check from the bottom up in an MBB for live pregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Added a comment.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Fix 80col violations, remove trailing whitespace, and clarify a comment.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Remove the local register allocator.Jakob Stoklund Olesen
Please use the fast allocator instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Fixed vector widening of binary instructions that can trap. Patch by Visa ↵Mon P Wang
Putkinen! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106038 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15IfConversion's AnalyzeBlocks method always returns false; clean it up.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106027 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15fix namingJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Fix an exotic bug that only showed up in an internal test case.Jakob Stoklund Olesen
SimpleRegisterCoalescing::JoinIntervals() uses CoalescerPair to determine if a copy is coalescable, and in very rare cases it can return true where LHS is not live - the coalescable copy can come from an alias of the physreg in LHS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Fix a comment typo.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Add some missing checks for the case where the extract_subregs areBob Wilson
combined to an insert_subreg, i.e., where the destination register is larger than the source. We need to check that the subregs can be composed for that case in a symmetrical way to the case when the destination is smaller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Avoid processing early clobbers twice in RegAllocFast.Jakob Stoklund Olesen
Early clobbers defining a virtual register were first alocated to a physreg and then processed as a physreg EC, spilling the virtreg. This fixes PR7382. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Add CoalescerPair helper class.Jakob Stoklund Olesen
Given a copy instruction, CoalescerPair can determine which registers to coalesce in order to eliminate the copy. It deals with all the subreg fun to determine a tuple (DstReg, SrcReg, SubIdx) such that: - SrcReg is a virtual register that will disappear after coalescing. - DstReg is a virtual or physical register whose live range will be extended. - SubIdx is 0 when DstReg is a physical register. - SrcReg can be joined with DstReg:SubIdx. CoalescerPair::isCoalescable() determines if another copy instruction is compatible with the same tuple. This fixes some NEON miscompilations where shuffles are getting coalesced as if they were copies. The CoalescerPair class will replace a lot of the spaghetti logic in JoinCopy later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Generalize the pre-coalescing of extract_subregs feeding reg_sequences,Bob Wilson
replacing the overly conservative checks that I had introduced recently to deal with correctness issues. This makes a pretty noticable difference in our testcases where reg_sequences are used. I've updated one test to check that we no longer emit the unnecessary subreg moves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Update CMake build.Ted Kremenek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14More dbg_value cleanup so the presence of debug info doesn't affect code-gen.Jim Grosbach
Make sure to skip the dbg_value instructions when moving dups out of the diamond. rdar://7797940 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14- Do away with SimpleHazardRecognizer.h. It's not used and offers little value.Evan Cheng
- Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105959 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14Avoid uncessary array copying.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14fix a -Wbool-conversions warning from clang.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12When performing the Horrible Hack(tm-Duncan) on the EH code to convert aBill Wendling
clean-up to a catch-all after inlining, take into account that there could be filter IDs as well. The presence of filters don't mean that the selector catches anything. It's just metadata information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105872 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12Allow target to provide its own hazard recognizer to post-ra scheduler.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12Code formatting.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11Support for nested functions/classes in debug output. (Again.) Radar 7424645.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105828 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-10Code refactoring, no functionality changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105775 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09Mark physregs defined by inline asm as implicit.Jakob Stoklund Olesen
This is a bit of a hack to make inline asm look more like call instructions. It would be better to produce correct dead flags during isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105749 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09Allow target to place 2-address pass inserted copies in better spots. Thumb2 ↵Evan Cheng
will use this to try to avoid breaking up IT blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09It's an error to translate this:Bill Wendling
%reg1025 = <sext> %reg1024 ... %reg1026 = SUBREG_TO_REG 0, %reg1024, 4 into this: %reg1025 = <sext> %reg1024 ... %reg1027 = EXTRACT_SUBREG %reg1025, 4 %reg1026 = SUBREG_TO_REG 0, %reg1027, 4 The problem here is that SUBREG_TO_REG is there to assert that an implicit zext occurs. It doesn't insert a zext instruction. If we allow the EXTRACT_SUBREG here, it will give us the value after the <sext>, not the original value of %reg1024 before <sext>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09Add argument name comments.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07Fix a mistake in my previous change r105437: don't access operand 2 and assumeBob Wilson
that it is an immediate before checking that the instruction is an EXTRACT_SUBREG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07Add some basic debug output.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105561 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07Cleanup. Process the dbg_values separatelyJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105554 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07Move exit check where it really belongs.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05Revert 105492 & 105493 due to a testcase regression. Radar 7424645.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105511 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05Fix some liveout handling related to tail calls, see comments.Dale Johannesen
I don't think this ever resulted in problems on x86, but it would on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105509 91177308-0d34-0410-b5e6-96231b3b80d8
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