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path: root/lib/CodeGen/VirtRegMap.cpp
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2012-12-04Remove VirtRegMap::getRegAllocPref().Jakob Stoklund Olesen
Now that there can be multiple hint registers from targets, it doesn't make sense to have a function that returns 'the' preferred register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases.Jakob Stoklund Olesen
Targets can provide multiple hints now, so getRegAllocPref() doesn't make sense any longer because it only returns one preferred register. Replace it with getSimpleHint() in the remaining heuristics. This function only git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add VirtRegMap::hasKnownPreference().Jakob Stoklund Olesen
Virtual registers with a known preferred register are prioritized by RAGreedy. This function makes the condition explicit without depending on getRegAllocPref(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28Make the LiveRegMatrix analysis available to targets.Jakob Stoklund Olesen
No functional change, just moved header files. Targets can inject custom passes between register allocation and rewriting. This makes it possible to tweak the register allocation before rewriting, using the full global interference checking available from LiveRegMatrix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Switch most getReservedRegs() clients to the MRI equivalent.Jakob Stoklund Olesen
Using the cached bit vector in MRI avoids comstantly allocating and recomputing the reserved register bit vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Fix a significant recent(?) regression. StackSlotColoring no longer did anythingEvan Cheng
because LiveStackAnalysis was not preserved by VirtRegWriter. This caused big stack usage regression in some cases. rdar://12340383 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Release build: guard dump functions withManman Ren
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)" No functional change. Update r163339. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Release build: guard dump functions with "ifndef NDEBUG"Manman Ren
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Handle overlapping regunit intervals in LiveIntervals::addKillFlags().Jakob Stoklund Olesen
We will soon allow virtual register live ranges to overlap regunit live ranges when the physreg is defined as a copy of the virtreg: %EAX = COPY %vreg5 FOO %vreg5 BAR %EAX<kill> There is no real interference since %vreg5 and %EAX have the same value where they overlap. This patch prevents addKillFlags from adding virtreg kill flags to FOO where the assigned physreg is overlapping the virtual register live range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper
did getFunction()->getName(). Remove includes of Function.h that are no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-09Also compute MBB live-in lists in the new rewriter pass.Jakob Stoklund Olesen
This deduplicates some code from the optimizing register allocators, and it means that it is now possible to change the register allocators' solutions simply by editing the VirtRegMap between the register allocator pass and the rewriter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08Reintroduce VirtRegRewriter.Jakob Stoklund Olesen
OK, not really. We don't want to reintroduce the old rewriter hacks. This patch extracts virtual register rewriting as a separate pass that runs after the register allocator. This is possible now that CodeGen/Passes.cpp can configure the full optimizing register allocator pipeline. The rewriter pass uses register assignments in VirtRegMap to rewrite virtual registers to physical registers, and it inserts kill flags based on live intervals. These finalization steps are the same for the optimizing register allocators: RABasic, RAGreedy, and PBQP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158244 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17Transfer regmasks to MRI.Jakob Stoklund Olesen
MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19Rewriter should definitly rewrite instructions inside bundles.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148464 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Use the 'regalloc' debug tag for most register allocator tracing.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-03Assert when reserved registers have been assigned.Jakob Stoklund Olesen
This can only happen if the set of reserved registers changes during register allocation. <rdar://problem/10625436> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13More dead code elimination in VirtRegMap.Jakob Stoklund Olesen
This thing is looking a lot like a virtual register map now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13Stop tracking spill slot uses in VirtRegMap.Jakob Stoklund Olesen
Nobody cared, StackSlotColoring scans the instructions to find used stack slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13Remove dead code and data from VirtRegMap.Jakob Stoklund Olesen
Most of this stuff was supporting the old deferred spill code insertion mechanism. Modern spillers just edit machine code in place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13Stop tracking unused registers in VirtRegMap.Jakob Stoklund Olesen
The information was only used by the register allocator in StackSlotColoring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Also add <imp-use,kill> flags for redefined super-registers.Jakob Stoklund Olesen
For example: %vreg10:dsub_0<def,undef> = COPY %vreg1 %vreg10:dsub_1<def> = COPY %vreg2 is rewritten as: %D2<def> = COPY %D0, %Q1<imp-def> %D3<def> = COPY %D1, %Q1<imp-use,kill>, %Q1<imp-def> The first COPY doesn't care about the previous value of %Q1, so it doesn't read that register. The second COPY is a partial redefinition of %Q1, so it implicitly kills and redefines that register. This makes it possible to recognize instructions that can harmlessly clobber the full super-register. The write and don't read the super-register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15VirtRegMap is counting spill slots, not register spills.Jakob Stoklund Olesen
Fix the stats counters to reflect that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06Also count identity copies.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27Also add <imp-def> operands for defined and dead super-registers when rewriting.Jakob Stoklund Olesen
We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as demonstrated by the test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen
liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Dump the register map before rewriting.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18Add VirtRegMap::rewrite() and use it in the new register allocators.Jakob Stoklund Olesen
The rewriter works almost identically to -rewriter=trivial, except it also eliminates any identity copies. This makes the new register allocators independent of VirtRegRewriter.cpp which will be going away at the same time as RegAllocLinearScan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen
These functions not longer assert when passed 0, but simply return false instead. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong resultsJakob Stoklund Olesen
when no virtual registers have been allocated. It was only used to resize IndexedMaps, so provide an IndexedMap::resize() method such that Map.grow(MRI.getLastVirtReg()); can be replaced with the simpler Map.resize(MRI.getNumVirtRegs()); This works correctly when no virtuals are allocated, and it bypasses the to/from index conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen
without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08Fix VirtRegMap to use TRI::index2VirtReg and TRI::virtReg2Index instead ofJakob Stoklund Olesen
depending on TRI::FirstVirtualRegister. Also use TRI::printReg instead of printing virtual registers directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16Remember to resize SpillSlotToUsesMap when allocating an emergency spill slot.Jakob Stoklund Olesen
Use amazing new function call technology instead of writing identical code in multiple places. This fixes PR8604. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07Now with fewer extraneous semicolons!Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-26Use the right floating point load/store instructions in ↵Jakob Stoklund Olesen
PPCInstrInfo::foldMemoryOperandImpl(). The PowerPC floating point registers can represent both f32 and f64 via the two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to allow cross-class coalescing. This coalescing only affects whether registers are spilled as f32 or f64. Spill slots must be accessed with load/store instructions corresponding to the class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking at the instruction opcode which is wrong. X86 has similar floating point register classes, but doesn't try to fold memory operands, so there is no problem there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Fix "the the" and similar typos.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12Add a bool flag to StackObjects telling whether they reference spillDavid Greene
slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03The Indexes Patch.Lang Hames
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng
get FixedStack PseudoSourceValues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-23remove some uses of llvm/Support/Streams.hChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24Move more to raw_ostream, provide support for writing MachineBasicBlock,Daniel Dunbar
LiveInterval, etc to raw_ostream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15Part 1.Evan Cheng
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent. - Allow targets to specify alternative register allocation orders based on allocation hint. Part 2. - Use the register allocation hint system to implement more aggressive load / store multiple formation. - Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g. v1025 = LDR v1024, 0 v1026 = LDR v1024, 0 => v1025,v1026 = LDRD v1024, 0 If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair. - Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions. This is work in progress, not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-14Move register allocation preference (or hint) from LiveInterval to ↵Evan Cheng
MachineRegisterInfo. This allows more passes to set them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04Restore minor deletion.Mike Stump
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03In some rare cases, the register allocator can spill registers but end up ↵Evan Cheng
not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants. Not yet enabled. This is part 1. More coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31Oy! When reverting r68073, I added in experimental code. Sorry...Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31Revert r68073. It's causing a failure in the Apple-style builds.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68092 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-14Add newlines at end of file (this can annoy gcov)Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67000 91177308-0d34-0410-b5e6-96231b3b80d8
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