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path: root/lib/CodeGen/SimpleRegisterCoalescing.cpp
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2010-03-02Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-23Remember to handle sub-registers when moving imp-defs to a rematted instruction.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21Enable assertion to detect cyclic valno references.Jakob Stoklund Olesen
This changes the stack overflow in PR6363 to an assertion failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13Fix PR6283.Jakob Stoklund Olesen
When coalescing with a physreg, remember to add imp-def and imp-kill when dealing with sub-registers. Also fix a related bug in VirtRegRewriter where substitutePhysReg may reallocate the operand list on an instruction and invalidate the reg_iterator. This can happen when a register is mentioned twice on the same instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11Reapply coalescer fix for better cross-class coalescing.Jakob Stoklund Olesen
This time with fixed test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11Revert functional change. This broke a bunch of tests.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11It is always good to do a cross-class join when the large register has a ↵Jakob Stoklund Olesen
tiny interval. Also avoid division by zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Ignore debug info one more place during coalescing.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Fix "the the" and similar typos.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Skip DBG_VALUE many places in live intervals andDale Johannesen
register coalescing. This fixes many crashes and places where debug info affects codegen (when dbg.value is lowered to machine instructions, which it isn't yet in TOT). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95739 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09Remember to update live-in lists when coalescing physregs.Jakob Stoklund Olesen
Patch by M Wahab! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Add coalescer asserts.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91945 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames
This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91859 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14Moved spill weight calculation out of SimpleRegisterCoalescing and into its ↵Lang Hames
own pass: CalculateSpillWeights. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11Coalesce insert_subreg undef, x first to avoid phase ordering issue.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91103 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10It's not safe to coalesce a move where src and dst registers have different ↵Evan Cheng
subregister indices. e.g.: %reg16404:1<def> = MOV8rr %reg16412:2<kill> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner
Patch by Howard Hinnant! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01Fix PR5391: support early clobber physical register def tied with a use (ewwww)Evan Cheng
- A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90269 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01Use CFG connectedness as a secondary sort key when deciding the order of ↵Jakob Stoklund Olesen
copy coalescing. This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to coalesce because intervals are more complicated, so handling them first gives a greater chance of success. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen
Fix debug code that assumes getBasicBlock never returns NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng
- If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,Evan Cheng
and extract_subreg as a "copy" that defines a valno. Also fixes a typo. These two issues prevent a simple subreg coalescing from happening before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03The Indexes Patch.Lang Hames
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30Stop the iterator in ValueLiveAt from potentially running off the end of the ↵Lang Hames
interval. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85599 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29Reapply r85338.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85514 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.Bill Wendling
--- Reverse-merging r85338 into '.': U lib/CodeGen/SimpleRegisterCoalescing.cpp U lib/CodeGen/SimpleRegisterCoalescing.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27Fixed a bug in the coalescer where intervals were occasionally merged ↵Lang Hames
despite a real interference. This fixes rdar://problem/7157961. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85338 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests andEvan Cheng
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg around. - Relax register scavenging to allow use of partially "not-live" registers. It's common for targets to operate on registers where the top bits are undef. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... = d0 When the insert_subreg is eliminated by the coalescer, the scavenger used to complain. The previous fix was to keep to insert_subreg around. But that's brittle and it's overly conservative when we want to use the scavenger to allocate registers. It's actually legal and desirable for other instructions to use the "undef" part of d0. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... s1 = = s1 = d0 We probably need add a "partial-undef" marker on machine operand so the machine verifier would not complain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25Do not delete identity insert_subreg even if dest is virtual. Let later ↵Evan Cheng
passes delete them. This avoids register scavenger complain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-24Rename isLoopExit to isLoopExiting, for consistency with the wordingDan Gohman
used elsewhere - an exit block is a block outside the loop branched to from within the loop. An exiting block is a block inside the loop that branches out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23Identity copies should not contribute to spill weight.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman
is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09isTriviallyReMaterializable checks theDan Gohman
TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83671 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-03Oops. Renamed remaining MachineInstrIndex references.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-03Renamed MachineInstrIndex to LiveIndex.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg ofEvan Cheng
physical registers. This is especially critical for the later two since they start the live interval of a super-register. e.g. %DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1 If this instruction is eliminated, the register scavenger will not be happy as D0 is not defined previously. This fixes PR5055. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24Clean up LiveVariables and change how it deals with partial updates and ↵Evan Cheng
kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Fix a obvious logic error.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-22Fix a pasto. Also simplify for Bill's benefit.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Clean up spill weight computation. Also some changes to give loop inductionEvan Cheng
variable increment / decrement slighter high priority. This has major impact on some micro-benchmarks. On MultiSource/Applications and spec tests, it's a minor win. It also reduce 256.bzip instruction count by 8%, 55 on 164.gzip on i386 / Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21Fix this assertion string to mention subreg_to_reg.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20Tabs -> spaces, and remove trailing whitespace.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17Fix PR4910: Broken logic in coalescer means when a physical register ↵Evan Cheng
liveness is being shortened, the sub-registers were not. The symptom is the register allocator could not find a free register for this particular test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12Remove -new-coalescer-heuristic. It's not useful.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08When remat'ing and destination virtual register has a sub-register index. ↵Evan Cheng
Make sure the sub-register class matches the register class of the remat'ed instruction definition register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-04Replaces uses of unsigned for indexes in LiveInterval and VNInfo withLang Hames
a new class, MachineInstrIndex, which hides arithmetic details from most clients. This is a step towards allowing the register allocator to update/insert code during allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-23remove some uses of llvm/Support/Streams.hChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-23Change Pass::print to take a raw ostream instead of std::ostream,Chris Lattner
update all code that this affects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79830 91177308-0d34-0410-b5e6-96231b3b80d8
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