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2013-03-08Revert r176154 in favor of a better approach.Bill Wendling
Code generation makes some basic assumptions about the IR it's been given. In particular, if there is only one 'invoke' in the function, then that invoke won't be going away. However, with the advent of the `llvm.donothing' intrinsic, those invokes may go away. If all of them go away, the landing pad no longer has any users. This confuses the back-end, which asserts. This happens with SjLj exceptions, because that's the model that modifies the IR based on there being invokes, etc. in the function. Remove any invokes of `llvm.donothing' during SjLj EH preparation. This will give us a CFG that the back-end won't be confused about. If all of the invokes in a function are removed, then the SjLj EH prepare pass won't insert the bogus code the relies upon the invokes being there. <rdar://problem/13228754&13316637> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176677 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07[fast-isel] Seriously, add support for the expect intrinsic.Chad Rosier
rdar://13370942 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176659 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07[fast-isel] Add support for the expect intrinsic.Chad Rosier
rdar://13370942 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176649 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07ArrayRefize some code. No functionality change.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176648 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07pre-RA-sched debug-only fixAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176638 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07pre-RA-sched assertion fix. This bug was exposed by r176037.Andrew Trick
rdar:13370002 [pre-RA-sched] assertion: released too many times I tracked this down to an earlier hack that is no longer applicable and interfered with normal scheduler logic. With the changes in r176037, it was causing an instruction to be scheduled multiple times. I have an external test case that I tried hard to reduce and failed. I can't even reproduce with llc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176636 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07No need to go through int64 and APInt when generating a new constant.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07SDAG: Handle scalarizing an extend of a <1 x iN> vector.Jim Grosbach
Just scalarize the element and rebuild a vector of the result type from that. rdar://13281568 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176614 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01Remove duplicate line and move another closer to its actual useEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01Set properties for f128 type.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01Generate an error message instead of asserting or segfaulting when we can'tChad Rosier
handle indirect register inputs. rdar://13322011 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01Fix PR10475Michael Liao
- ISD::SHL/SRL/SRA must have either both scalar or both vector operands but TLI.getShiftAmountTy() so far only return scalar type. As a result, backend logic assuming that breaks. - Rename the original TLI.getShiftAmountTy() to TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to return target-specificed scalar type or the same vector type as the 1st operand. - Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176364 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28A small refactoring + adding comments.Eli Bendersky
SelectionDAGIsel::LowerArguments needs a function, not a basic block. So it makes sense to pass it the function instead of extracting a basic-block from the function and then tossing it. This is also more self-documenting (functions have arguments, BBs don't). In addition, added comments to a couple of Select* methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176305 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28Put some per-instruction statistics of fast isel under NDEBUG, together withEli Bendersky
other per-instruction statistics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176273 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27Remove unnecessary cast to void.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27Silence the unused variable warning. Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27The FastISEL should be fast. But when we record statistics we use atomic ↵Nadav Rotem
operations to increment the counters. This patch disables the counters on non-debug builds. This reduces the runtime of SelectionDAGISel::SelectCodeCommon by ~5%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176214 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27Reverted: r176136 - Have a way for a target to opt-out of target-independent ↵Michael Ilseman
fast isel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27SelectionDAG: If llvm.donothing has a landingpad, we should clearManman Ren
CurrentCallSite to avoid an assertion failure: assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!"); rdar://problem/13228754 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176154 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Have a way for a target to opt-out of target-independent fast iselMichael Ilseman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176136 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix wording.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25[fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 orChad Rosier
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25pre-RA-sched fix: only reevaluate physreg interferences when necessary.Andrew Trick
Fixes rdar:13279013: scheduler was blowing up on select instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176037 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix spelling noticed by Duncan.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176023 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix the root cause of PR15348 by correctly handling alignment 0 onChandler Carruth
memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176022 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22SelectionDAG compile time improvement.Nadav Rotem
One of the phases of SelectionDAG is LegalizeVectors. We don't need to sort the DAG and copy nodes around if there are no vector ops. Speeds up the compilation time of SelectionDAG on a big scalar workload by ~8%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Fix isa<> check which could never be true.Pete Cooper
It was incorrectly checking a Function* being an IntrinsicInst* which isn't possible. It should always have been checking the CallInst* instead. Added test case for x86 which ensures we only get one constant load. It was 2 before this change. rdar://problem/13267920 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21DAGCombiner: Make the post-legalize vector op optimization more aggressive.Benjamin Kramer
A legal BUILD_VECTOR goes in and gets constant folded into another legal BUILD_VECTOR so we don't lose any legality here. The problematic PPC optimization that made this check necessary was fixed recently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175759 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20DAGCombiner: Fold pointless truncate, bitcast, buildvector seriesArnold Schwaighofer
(2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y))) can be folded into a (2xi32) (buildvector i32 a, i32 b). Such a DAG would cause uneccessary vdup instructions followed by vmovn instructions. We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in the vectorized version of the code below. double A[N]; double B[N]; void test_double_compare_to_double() { int i; for(i=0;i<N;i++) A[i] = (double)(A[i] < B[i]); } radar://13191881 Fixes bug 15283. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175670 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Fix PR15267Michael Liao
- When extloading from a vector with non-byte-addressable element, e.g. <4 x i1>, the current logic breaks. Extend the current logic to fix the case where the element type is not byte-addressable by loading all bytes, bit-extracting/packing each element. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175642 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Move the SplatByte helper to APInt and generalize it a bit.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Fix #includes, so we include only what we really need.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175581 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18[ms-inline asm] Remove a redundant call to the setHasMSInlineAsm function.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175456 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18[ms-inline asm] Fix undefined behavior to reset hasMSInlineAsm in advance of ↵NAKAMURA Takumi
SelectAllBasicBlocks(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16LegalizeDAG.cpp doesn't need DenseMap.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175365 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16[ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier
If the frame pointer is omitted, and any stack changes occur in the inline assembly, e.g.: "pusha", then any C local variable or C argument references will be incorrect. I pass no judgement on anyone who would do such a thing. ;) rdar://13218191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175334 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15Use the 'target-features' and 'target-cpu' attributes to reset the subtarget ↵Bill Wendling
features. If two functions require different features (e.g., `-mno-sse' vs. `-msse') then we want to honor that, especially during LTO. We can do that by resetting the subtarget's features depending upon the 'target-feature' attribute. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15enable SDISel sincos optimization for GNU environmentsPaul Redmond
- add sincos to runtime library if target triple environment is GNU - added canCombineSinCosLibcall() which checks that sincos is in the RTL and if the environment is GNU then unsafe fpmath is enabled (required to preserve errno) - extended sincos-opt lit test Reviewed by: Hal Finkel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175283 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14Add some legality checks for SETCC before introducing it in the DAG combiner ↵Owen Anderson
post-operand legalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175149 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add static cast to unsigned char whenever a character classification ↵Guy Benyei
function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12PR14562 - Truncation of left shift became undefPaul Redmond
DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32)) into (shl i32 v, 32) into undef. To prevent this, check the shift count against the final result size. Patch by: Kevin Schoedel Reviewed by: Nadav Rotem git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Check type for legality before forming a select from loads.Pete Cooper
Sorry for the lack of a test case. I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later. I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng
function is successfully handled by fast-isel. That's because function arguments are *always* handled by SDISel. Introduce FastLowerArguments to allow each target to provide hook to handle formal argument lowering. As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It completely eliminates the need for SDISel for trivial functions. rdar://13163905 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174855 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Remove unnecessary code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174854 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08DAGCombiner: Constant folding around pre-increment loads/storesHal Finkel
Previously, even when a pre-increment load or store was generated, we often needed to keep a copy of the original base register for use with other offsets. If all of these offsets are constants (including the offset which was combined into the addressing mode), then this is clearly unnecessary. This change adjusts these other offsets to use the new incremented address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.Bob Wilson
Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174741 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-06Tweak check to avoid integer overflow (for insanely large alignments)Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174482 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Reapply r174343, with a fix for a scary DAG combine bug where it failed to ↵Owen Anderson
differentiate between the alignment of the base point of a load, and the overall alignment of the load. This caused infinite loops in DAG combine with the original application of this patch. ORIGINAL COMMIT LOG: When the target-independent DAGCombiner inferred a higher alignment for a load, it would replace the load with one with the higher alignment. However, it did not place the new load in the worklist, which prevented later DAG combines in the same phase (for example, target-specific combines) from ever seeing it. This patch corrects that oversight, and updates some tests whose output changed due to slightly different DAGCombine outputs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174431 91177308-0d34-0410-b5e6-96231b3b80d8
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