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2006-11-06Add comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31473 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05Unbreak VC++ build.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05Added pre-indexed store support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31459 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05Added getIndexedStore.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31458 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-04Changes to use operand constraints to process two-address instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31453 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03Fix comments.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31414 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03RenameEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03Remove dead variable. Fix 80 column violations.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03Added DAG combiner transformation to generate pre-indexed loads.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31410 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03Added isPredecessor.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31409 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03silence warningChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31397 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02For PR786:Reid Spencer
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting fall out by removing unused variables. Remaining warnings have to do with unused functions (I didn't want to delete code without review) and unused variables in generated code. Maintainers should clean up the remaining issues when they see them. All changes pass DejaGnu tests and Olden. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02For PR950:Reid Spencer
Replace the REM instruction with UREM, SREM and FREM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02Allow the getRegForInlineAsmConstraint method to return a register class withChris Lattner
no fixes physreg. Treat this as permission to use any register in the register class. When this happens and it is safe, allow the llvm register allcoator to allocate the register instead of doing it at isel time. This eliminates a ton of copies around common inline asms. For example: int test2(int Y, int X) { asm("foo %0, %1" : "=r"(X): "r"(X)); return X; } now compiles to: _test2: foo r3, r4 blr instead of: _test2: mr r2, r4 foo r2, r2 mr r3, r2 blr GCC produces: _test2: foo r4, r4 mr r3,r4 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01Clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31359 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01CopyFromReg starts a live range so its use should not be considered a floater.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31356 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01Print jumptable index.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31340 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31Compile CodeGen/PowerPC/fp-branch.ll to:Chris Lattner
_intcoord_cond_next55: LBB1_3: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 blt cr0, LBB1_2 ;cond_next62.exitStub LBB1_1: ;bb72.exitStub li r3, 1 blr LBB1_2: ;cond_next62.exitStub li r3, 0 blr instead of: _intcoord_cond_next55: LBB1_3: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 bge cr0, LBB1_1 ;bb72.exitStub LBB1_4: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 bnu cr0, LBB1_2 ;cond_next62.exitStub LBB1_1: ;bb72.exitStub li r3, 1 blr LBB1_2: ;cond_next62.exitStub li r3, 0 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31look through isunordered to inline it into branch blocks.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31328 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31handle global address constant sdnodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31323 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31TargetLowering::isOperandValidForConstraintChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31319 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31Change the prototype for TargetLowering::isOperandValidForConstraintChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31Turn an assert into an error message. This is commonly triggered whenChris Lattner
we don't support a specific constraint yet. When this happens, print the unsupported constraint. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31Fix a typo which can break jumptables.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the ↵Evan Cheng
target custom lower it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30Added a new SDNode type: BR_JT for jumptable branch.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31292 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-29fix Generic/2006-10-29-Crash.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31281 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-29Fix a load folding issue that Evan noticed: there is no need to export valuesChris Lattner
used by comparisons in the main block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-29VLOAD is not the LoadSDNode opcode.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31276 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-29Remove spurious case. EXTLOAD is not one of the node opcodes.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-28split critical edges more carefully and intelligently. In particular, criticalChris Lattner
edges whose destinations are not phi nodes don't bother us. Also, share split edges, since the split edge can't have a phi. This significantly reduces the complexity of generated code in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-28Load and stores have not been uniqued properly.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31261 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-28Split *all* critical edges before isel. This resolves issues with spill codeChris Lattner
being inserted on unsplit critical edges, which introduces (sometimes large amounts of) partially dead spill code. This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-28Fix a serious bug that caused any x86 vector stuff to infinite loopChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31254 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Clean up.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Fix a bug in merged condition handling ↵Chris Lattner
(CodeGen/Generic/2006-10-27-CondFolding.ll). Add many fewer CFG edges and PHI node entries. If there is a switch which has the same block as multiple destinations, only add that block once as a successor/phi node (in the jumptable case) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31242 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Switch over from SelectionNodeCSEMap to FoldingSet.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31240 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27remove debug codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31233 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Codegen cond&cond with two branches. This compiles (f.e.) ↵Chris Lattner
PowerPC/and-branch.ll to: cmpwi cr0, r4, 4 bgt cr0, LBB1_2 ;UnifiedReturnBlock LBB1_3: ;entry cmplwi cr0, r3, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r3, r4, r3 rlwinm r2, r2, 30, 31, 31 or r2, r2, r3 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock LBB1_1: ;cond_true git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Turn conditions like x<Y|z==q into multiple blocks.Chris Lattner
This compiles Regression/CodeGen/X86/or-branch.ll into: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $5, %eax jl LBB1_1 #cond_true LBB1_3: #entry testl %ecx, %ecx jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret instead of: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $4, %eax setg %al testl %ecx, %ecx setne %cl testb %cl, %al jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret And on ppc to: cmpwi cr0, r29, 5 blt cr0, LBB1_1 ;cond_true LBB1_3: ;entry cmplwi cr0, r30, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r30, r4, r3 rlwinm r29, r2, 30, 31, 31 and r2, r29, r30 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-26getPreIndexedLoad -> getIndexedLoad.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31209 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-26For PR950:Reid Spencer
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to have three division instructions: signed, unsigned, floating point. The bytecode and assembler are bacwards compatible, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24visitSwitchCase knows how to insert conditional branches well. ChangeChris Lattner
visitBr to just call visitSwitchCase, eliminating duplicate logic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24Generalize CaseBlock a bit more:Chris Lattner
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null, in which case the LHS is treated as a bool. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31166 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24generalize 'CaseBlock'. It really allows any comparison to be inserted.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31161 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-23Minor tweak. Instead of generating:Chris Lattner
movl 32(%esp), %eax cmpl $1, %eax je LBB1_1 #bb LBB1_4: #entry cmpl $2, %eax je LBB1_2 #bb2 jmp LBB1_3 #UnifiedReturnBlock LBB1_1: #bb notice that we would miss the fall through and emit this instead: movl 32(%esp), %eax cmpl $2, %eax je LBB1_2 #bb2 LBB1_4: #entry cmpl $1, %eax jne LBB1_3 #UnifiedReturnBlock LBB1_1: #bb git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-22Fix phi node updating for switches lowered to linear sequences of branches.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-22disable this code for now, it's not yet safely updating phi nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31124 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-22Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-20Make flag and chain edges visually distinguishable from value edges in DOTChris Lattner
output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31067 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-04-02 21:49:53 +0000