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2006-12-11Clean up some bad code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32432 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-11Move something that should be in the dag combiner from the legalizer to theNate Begeman
dag combiner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32431 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-10Cleaned setjmp/longjmp lowering interfaces. Now we're producing rightAnton Korobeynikov
code (both asm & cbe) for Mingw32 target. Removed autoconf checks for underscored versions of setjmp/longjmp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-09Preliminary soft float support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32394 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32336 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07Removed more <iostream> includesBill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07Removing even more <iostream> includes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06Detemplatize the Statistic class. The only type it is instantiated withChris Lattner
is 'unsigned'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-02Unbreak VC++ build.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32113 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01Match TargetInstrInfo changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29Avoid inifinite looping if READCYCLECOUNTER isn't custom lowered.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32022 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29Allow target to custom lower READCYCLECOUNTER (when it doesn't have to be ↵Evan Cheng
expanded). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32016 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29Fix for PR1023 by Dan Gohman.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32003 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29Fix for PR1022 (folding loads of static initializers) by Dan Gohman.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32000 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29add a hook to allow targets to hack on inline asms to lower them to llvmChris Lattner
when they want to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31997 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-28Fix PR1016Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31950 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng
of opcode and number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27Fix the dag combiner bug corresponding to PR1014.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27For better or worse, load from i1 is assumed to be zero extended. Do notChris Lattner
form a load from i1 from larger loads that may not be zext'd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27If a brcond condition is promoted, make sure to zero extend it, even if notChris Lattner
expanded into BR_CC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27For PR950:Reid Spencer
The long awaited CAST patch. This introduces 12 new instructions into LLVM to replace the cast instruction. Corresponding changes throughout LLVM are provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the exception of 175.vpr which fails only on a slight floating point output difference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31878 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20For PR950:Reid Spencer
First in a series of patches to convert SetCondInst into ICmpInst and FCmpInst using only two opcodes and having the instructions contain their predicate value. Nothing uses these classes yet. More patches to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31822 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16Fix an incorrectly inverted condition.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15remove dead #includeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31753 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13Matches MachineInstr changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11Make an assert comment match the tested assertion.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31686 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11Add methods to add implicit def use operands to a MI.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11disallow preinc of a frameindex. This is not profitable and causes 2-addrChris Lattner
pass to explode. This fixes a bunch of llc-beta failures on ppc last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11reduce indentation by using early exits. No functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11move big chunks of code out-of-line, no functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10Fix a dag combiner bug exposed by my recent instcombine patch. This fixesChris Lattner
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10Add implicit def / use operands to MachineInstr.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10When forming a pre-indexed store, make sure ptr isn't the same or is a pred ↵Evan Cheng
of value being stored. It would cause a cycle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10commentateChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09Don't attempt expensive pre-/post- indexed dag combine if target does not ↵Evan Cheng
support them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09Add a mechanism to specify whether a target supports a particular indexed ↵Evan Cheng
load / store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09getPostIndexedAddressParts change: passes in load/store instead of its ↵Evan Cheng
loaded / stored VT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08Match more post-indexed ops.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08Remove redundant <cmath>.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08- When performing pre-/post- indexed load/store transformation, do not worryEvan Cheng
about whether the new base ptr would be live below the load/store. Let two address pass split it back to non-indexed ops. - Minor tweaks / fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08Fixed a minor bug preventing some pre-indexed load / store transformation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08For PR950:Reid Spencer
This patch converts the old SHR instruction into two instructions, AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not dependent on the sign of their operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08Fix a obscure post-indexed load / store dag combine bug.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07Add post-indexed load / store transformations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31498 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll.Chris Lattner
The low part goes in the first operand of expandop, not the second one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31487 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-06Remove dead code; added a missing null ptr check.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31478 91177308-0d34-0410-b5e6-96231b3b80d8
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