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2012-06-04Remove the "-promote-elements" flag. This flag is now enabled by default.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02PR1255: case ranges.Stepan Dyatkovskiy
IntRange converted from struct to class. So main change everywhere is replacement of ".Low/High" with ".getLow/getHigh()" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02PR1255: case ranges.Stepan Dyatkovskiy
IntegersSubsetGeneric, IntegersSubsetMapping: added IntTy template parameter, that allows use either APInt or IntItem. This change allows to write unittest for these classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG.Akira Hatanaka
Check that the SDValue TargetLowering::LowerOperation returns is not null before replacing the original node with the returned node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157873 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Simplify some more getAliasSet callers.Jakob Stoklund Olesen
MCRegAliasIterator can include Reg itself in the list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01ARM: properly handle alignment for struct byval.Manman Ren
Factor out the expansion code into a function. This change is to be enabled in clang. rdar://9877866 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01PR1255: case ranges.Stepan Dyatkovskiy
IntegersSubset devided into IntegersSubsetGeneric and into IntegersSubset itself. The first has no references to ConstantInt and works with IntItem only. IntegersSubsetMapping also made generic. Here added second template parameter "IntegersSubsetTy" that allows to use on of two IntegersSubset types described below. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Switch the canonical FMA term operand order to match both the comment I ↵Owen Anderson
wrote and the usual LLVM convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Teach DAGCombine to canonicalize the position of a constant in the term ↵Owen Anderson
operands of an FMA node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to ↵Stepan Dyatkovskiy
IntegersSubsetMapping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-28Add llvm.fabs intrinsic.Peter Collingbourne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157594 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-28PR1255: Case RangesStepan Dyatkovskiy
Implemented IntItem - the wrapper around APInt. Why not to use APInt item directly right now? 1. It will very difficult to implement case ranges as series of small patches. We got several large and heavy patches. Each patch will about 90-120 kb. If you replace ConstantInt with APInt in SwitchInst you will need to changes at the same time all Readers,Writers and absolutely all passes that uses SwitchInst. 2. We can implement APInt pool inside and save memory space. E.g. we use several switches that works with 256 bit items (switch on signatures, or strings). We can avoid value duplicates in this case. 3. IntItem can be easyly easily replaced with APInt. 4. Currenly we can interpret IntItem both as ConstantInt and as APInt. It allows to provide SwitchInst methods that works with ConstantInt for non-updated passes. Why I need it right now? Currently I need to update SimplifyCFG pass (EqualityComparisons). I need to work with APInts directly a lot, so peaces of code ConstantInt *V = ...; if (V->getValue().ugt(AnotherV->getValue()) { ... } will look awful. Much more better this way: IntItem V = ConstantIntVal->getValue(); if (AnotherV < V) { } Of course any reviews are welcome. P.S.: I'm also going to rename ConstantRangesSet to IntegersSubset, and CRSBuilder to IntegersSubsetMapping (allows to map individual subsets of integers to the BasicBlocks). Since in future these classes will founded on APInt, it will possible to use them in more generic ways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157576 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27Missed parens.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27r157525 didn't work, just disable iterator checking.Benjamin Kramer
This is obviosly right but I don't see how to do this with proper vector iterators without building a horrible mess of workarounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27SDAGBuilder: Avoid iterator invalidation harder.Benjamin Kramer
vector.begin()-1 is invalid too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157525 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26SDAGBuilder: Don't create an invalid iterator when there is only one switch ↵Benjamin Kramer
case. Found by libstdc++'s debug mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157522 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26SelectionDAGBuilder: When emitting small compare chains for switches order ↵Benjamin Kramer
them by using edge weights. SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move the most likely condition to the front so it is checked first and the others can be skipped. This is currently not as effective as it could be because SimplifyCFG destroys profiling metadata when merging branches and switches. Merging branch weight metadata is tricky though. This code touches at most 3 cases so I didn't use a proper sorting algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157521 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski
to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Simplify code for calling a function where CanLowerReturn fails, fixing a ↵Eli Friedman
small bug in the process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Mark some static arrays as const.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. ↵Owen Anderson
No in-tree targets exercise this path. Patch by Micah Villmow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21Typo.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne
may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Properly constrain register classes for sub-registers.Jakob Stoklund Olesen
Not all GR64 registers have sub_8bit sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Recommited reworked r156804:Stepan Dyatkovskiy
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed ↵Stepan Dyatkovskiy
representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156909 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15Rejected r156804 due to buildbots failures.Stepan Dyatkovskiy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156808 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15SelectionDAGBuilder::Clusterify : main functinality was replaced with ↵Stepan Dyatkovskiy
CRSBuilder::optimize, so big part of Clusterify's code was reduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Revert 156658.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156662 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Fast-isel doesn't use the expect intrinsic.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman
but it generates int3 on x86 instead of ud2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-08DAGCombiner should not change the type of an extract_vector index.Jim Grosbach
When a combine twiddles an extract_vector, care should be take to preserve the type of the index operand. No luck extracting a reasonable testcase, unfortunately. rdar://11391009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen
The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-05Add a new target hook "predictableSelectIsExpensive".Benjamin Kramer
This will be used to determine whether it's profitable to turn a select into a branch when the branch is likely to be predicted. Currently enabled for everything but Atom on X86 and Cortex-A9 devices on ARM. I'm not entirely happy with the name of this flag, suggestions welcome ;) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04Make sure findRepresentativeClass picks the widest super-register.Jakob Stoklund Olesen
We want the representative register class to contain the largest super-registers available. This makes the function less sensitive to the register class numbering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04Use SuperRegClassIterator for findRepresentativeClass().Jakob Stoklund Olesen
The masks returned by SuperRegClassIterator are computed automatically by TableGen. This is better than depending on the manually specified SuperRegClasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Added TargetRegisterInfo::getAllocatableClass.Andrew Trick
The ensures that virtual registers always belong to an allocatable class. If your target attempts to create a vreg for an operand that has no allocatable register subclass, you will crash quickly. This ensures that targets define register classes as intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, ↵Owen Anderson
just like it now knows for FMULs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Teach DAG combine that multiplication by 1.0 can always be constant folded.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Use dyn_cast instead of checking opcode and cast.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155957 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Strip the pointer casts off of allocas so that the selection DAG can find them.Bill Wendling
PR10799 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30Add some constantness. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick
This time, also fix the caller of AddGlue to properly handle incomplete chains. AddGlue had failure modes, but shamefully hid them from its caller. It's luck ran out. Fixes rdar://11314175: BuildSchedUnits assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27Temporarily revert r155668: Fix the SD scheduler to avoid gluing.Andrew Trick
This definitely caused regression with ARM -mno-thumb. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155743 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-26Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick
DAGCombine strangeness may result in multiple loads from the same offset. They both may try to glue themselves to another load. We could insist that the redundant loads glue themselves to each other, but the beter fix is to bail out from bad gluing at the time we detect it. Fixes rdar://11314175: BuildSchedUnits assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155668 91177308-0d34-0410-b5e6-96231b3b80d8
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