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2008-03-27Implement LegalizeTypes support for softfloat LOAD.Duncan Sands
In order to handle indexed nodes I had to introduce a new constructor, and since I was there I factorized the code in the various load constructors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48894 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27Avoid creating chain dependencies from CopyToReg nodes to load and storeDan Gohman
nodes. This doesn't currently have much impact the generated code, but it does produce simpler-looking SelectionDAGs, and consequently simpler-looking ScheduleDAGs, because there are fewer spurious dependencies. In particular, CopyValueToVirtualRegister now uses the entry node as the input chain dependency for new CopyToReg nodes instead of calling getRoot and depending on the most recent memory reference. Also, rename UnorderedChains to PendingExports and pull it up from being a local variable in SelectionDAGISel::BuildSelectionDAG to being a member variable of SelectionDAGISel, so that it doesn't have to be passed around to all the places that need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27Fix spelling. Thanks, Duncan! :-)Roman Levenstein
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48873 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27Speed-up the SumOfUnscheduledPredsOfSuccs by introducing a new functionRoman Levenstein
called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation after a given treshold is reached. This new function is always faster, but brings real wins only on bigger test-cases. The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26Use a linked data structure for the uses lists of an SDNode, just like Roman Levenstein
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does. This allows constant time for all uses list maintenance operations. The idea was suggested by Chris. Reviewed by Evan and Dan. Patch is tested and approved by Dan. On normal use-cases compilation speed is not affected. On very big basic blocks there are compilation speedups in the range of 15-20% or even better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26Fixed some spelling errors. Thanks, Duncan!Roman Levenstein
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48819 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26Some improvements related to the computation of isReachable.Roman Levenstein
This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835). This patched is reviewed by Tanya and Dan. Dan tested and approved it. The reason for the bad performance of the old algorithm is that it is very naive and scans every time all nodes of the DAG in the worst case. This patch introduces a new algorithm based on the paper "Online algorithms for maintaining the topological order of a directed acyclic graph" by David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a linear time worst-case and performs much better in most situations. The paper can be found here: http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html The main idea of the new algorithm is to compute the topological ordering of the SNodes in the DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast node reachability checks. Tests on very big input files with tens of thousands of instructions in a BB indicate huge speed-ups (up to 10x compilation time improvement) compared to the old version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48817 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25A quick nm audit turned up several fixed tables and objects that wereDan Gohman
marked read-write. Use const so that they can be allocated in a read-only segment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25Handle a special case xor undef, undef -> 0. Technically this should be ↵Evan Cheng
transformed to undef. But this is such a common idiom (misuse) we are going to handle it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25Fix typos.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24Remove an unneeded test.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48755 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24APIntify SelectionDAG's EXTRACT_ELEMENT code.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48726 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22Another comments fixingAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48683 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22Teach DAG combiner to commute commutable binary nodes in order to achieve ↵Evan Cheng
sdisel CSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21Fix -view-sunit-dags to support cross-rc-copy nodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48664 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21Introduce a new node for holding call argumentDuncan Sands
flags. This is needed by the new legalize types infrastructure which wants to expand the 64 bit constants previously used to hold the flags on 32 bit machines. There are two functional changes: (1) in LowerArguments, if a parameter has the zext attribute set then that is marked in the flags; before it was being ignored; (2) PPC had some bogus code for handling two word arguments when using the ELF 32 ABI, which was hard to convert because of the bogusness. As suggested by the original author (Nicolas Geoffray), I've disabled it for the moment. Tested with "make check" and the Ada ACATS testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20Check even more carefully before applying this DAGCombine transform.Christopher Lamb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48580 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, ↵Evan Cheng
result_size - n - m))) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20detabify llvm, patch by Mike Stump!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19Fix X86's isTruncateFree to not claim that truncate to i1 is free. This ↵Christopher Lamb
fixes Bill's testcase that failed for r48491. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18Make conversions of i8/i16 to ppcf128 work.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18Target independent DAG transform to use truncate for field extraction + sign ↵Christopher Lamb
extend on targets where this is profitable. Passes nightly on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb
LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15Replace all target specific implicit def instructions with a target ↵Evan Cheng
independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Do not generate special entries in the dwarf ehDuncan Sands
table for nounwind calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48373 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Simplify using getIntPtrConstant.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Tabs -> spacesNate Begeman
Use getIntPtrConstant in a couple places to shorten stuff up Handle splitting vector shuffles with undefs in the mask git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48351 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14Livein copy scheduling fixes: do not coalesce physical register copies, ↵Evan Cheng
correctly determine the safe location to insert the copies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13More APInt-ification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Experimental scheduler change to schedule / coalesce the copies added for ↵Evan Cheng
function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1028<def> = MOV32rr %EAX %reg1029<def> = MOV32rr %EDX %reg1030<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0] %reg1025<def> = MOV32rr %reg1029 %reg1026<def> = MOV32rr %reg1030 %reg1024<def> = MOV32rr %reg1028 The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled. With -schedule-livein-copies: entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1024<def> = MOV32rr %EAX %reg1025<def> = MOV32rr %EDX %reg1026<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0] Much better! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Initial soft-float support for LegalizeTypes. I rewroteDuncan Sands
the fcopysign expansion from LegalizeDAG to get rid of what seems to be a bug: the use of sign extension means that when copying the sign bit from an f32 to an f64, the upper 32 bits of the f64 (now an i64) are set, not just the top bit... I also generalized it to work for any sized floating point types, and removed the bogosity: SDOperand Mask1 = (SrcVT == MVT::f64) ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT) : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT); Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1); (here SrcNVT is an integer with the same size as SrcVT). As far as I can see this takes a 1 << 63, converts to a double, converts that to a floating point constant then converts that to an integer constant, ending up with... 1 << 63 as an integer constant! So I just generate this integer constant directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Fix typo.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Don't try to extract an i32 from an f64. ThisDuncan Sands
getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Clean up my own mess.Evan Cheng
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12Total brain cramp.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Use the correct value for InSignBit.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Initial codegen support for functions and calls with multiple return values.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb
failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11When the register allocator runs out of registers, spill a physical register ↵Evan Cheng
around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Some LegalizeTypes code factorization and minorDuncan Sands
enhancements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11compile: double test() {}Chris Lattner
into: _test: fldz ret instead of: _test: subl $12, %esp #IMPLICIT_DEF %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $12, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11variadic instructions don't have operand info for variadic arguments.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11Generalize ExpandIntToFP to handle the case where the operand is legalDan Gohman
and it's the result that requires expansion. This code is a little confusing because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type (the integer type) rather than the result type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11If a register operand comes from the variadic part of a node, don'tChris Lattner
verify the register constraint matches what the instruction expects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11More APInt-ification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Correctly clone FlaggedNodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10APInt-ify this.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Implement more support for fp-to-i128 and i128-to-fp conversions. Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
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