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AgeCommit message (Collapse)Author
2008-05-20Port the fix for the select operator from instcombine'sDan Gohman
ComputeNumSignBits to SelectionDAG's ComputeNumSignBits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20Code simplification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source ↵Evan Cheng
is a v1* vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51192 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16Silence the compiler warning differently. TheDuncan Sands
original method caused gcc-4.2 to complain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51186 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15Actually scalarize the operand to BIT_CONVERT instead of asking someone to doNate Begeman
something with a v1 type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51160 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15IR support for extractvalue and insertvalue instructions. Also, beginDan Gohman
moving toward making structs and arrays first-class types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51157 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15Make use of vector load and store operations to implement memcpy, memmove, ↵Evan Cheng
and memset. Currently only X86 target is taking advantage of these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14Use a better idiom to silence compiler warnings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51131 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14Really silence compiler warnings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51126 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14Really silence compiler warnings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51123 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14Silence some compiler warnings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51115 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14When bit-twiddling CondCode values for integer comparisons producesDan Gohman
SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14Whitespace cleanups.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51089 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13Instead of a vector load, shuffle and then extract an element. Load the ↵Evan Cheng
element from address with an offset. pshufd $1, (%rdi), %xmm0 movd %xmm0, %eax => movl 4(%rdi), %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13Clean up the use of static and anonymous namespaces. This turned upDan Gohman
several things that were neither in an anonymous namespace nor static but not intended to be global. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Teach Legalize how to scalarize VSETCCNate Begeman
Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Xform bitconvert(build_pair(load a, load b)) to a single load if the load ↵Evan Cheng
locations are at the right offset from each other. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can ↵Evan Cheng
make use of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Add support for vicmp/vfcmp codegen, more legalize support coming.Nate Begeman
This is necessary to unbreak the build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50988 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50967 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07Turn StripPointerCast() into a methodAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07Fix a bug in the ComputeMaskedBits logic for multiply.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50793 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Make StripPointerCast a common function (should we mak it method of Value ↵Anton Korobeynikov
instead?) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50775 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Make several variable declarations static.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Instead of enumerating each opcode that isn't handled thatDan Gohman
ComputeMaskedBits handles, just use a 'default:'. This avoids TargetLowering's list getting out of date with SelectionDAG's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Correct the value of LowBits in srem and urem handling inDan Gohman
ComputeMaskedBits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02Fix a mistake in the computation of leading zeros for udiv.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02Fix a typo in a comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02Use push_back(...) instead of resize(1, ...), per review feedback.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50561 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01Fix uninitialized uses of the FPC variable.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01don't randomly miscompile seto/setuo just because we are in Chris Lattner
ffastmath mode. This fixes rdar://5902801, a miscompilation of gcc.dg/builtins-8.c. Bill, please pull this into Tak. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50523 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30Tail call optimization improvements:Arnold Schwaighofer
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30Fix custom target lowering for zero/any/sign_extend: make sure thatScott Michel
DAG.UpdateNodeOperands() is called before (not after) the call to TLI.LowerOperation(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29Use std::set instead of std::priority_queue for the RegReductionPriorityQueue. Roman Levenstein
This removes the existing bottleneck related to the removal of elements from the middle of the queue. Also fixes a subtle bug in ScheduleDAGRRList::CapturePred: It was updating the state of the SUnit before removing it. As a result, the comparison operators were working incorrectly and this SUnit could not be removed from the queue properly. Reviewed by Evan and Dan. Approved by Dan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29make the vector conversion magic handle multiple results.Chris Lattner
We now compile test2/test3 to: _test2: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End addps %xmm1, %xmm0 ret _test3: ## InlineAsm Start set %xmm0, %xmm1 ## InlineAsm End paddd %xmm1, %xmm0 ret as expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29add support for multiple return values in inline asm. This is a step Chris Lattner
towards PR2094. It now compiles the attached .ll file to: _sad16_sse2: movslq %ecx, %rax ## InlineAsm Start %ecx %rdx %rax %rax %r8d %rdx %rsi ## InlineAsm End ## InlineAsm Start set %eax ## InlineAsm End ret which is pretty decent for a 3 output, 4 input asm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50386 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling ↵Evan Cheng
units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs: c1, f1 = CopyToReg c2, f2 = CopyToReg c3 = TokenFactor c1, c2 ... = user c3, ..., f2 Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Evan pointed out that folding sext to zext may not be correctDan Gohman
if the zext is not legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Delete an unused constructor.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50367 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Add a comment to CreateRegForValue that clarifies the handling ofDan Gohman
aggregate types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50366 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Rewrite the comments for RegsForValue and its members, andDan Gohman
reorder some of the members for clarity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50365 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Don't call size() on each iteration of the loop.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Fix the SVOffset values for loads and stores produced byDan Gohman
memcpy/memset expansion. It was a bug for the SVOffset value to be used in the actual address calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Teach InstCombine's ComputeMaskedBits what SelectionDAG'sDan Gohman
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach SelectionDAG's ComputeMaskedBits what InstCombine's knows about SRem. And teach them both some things about high bits in Mul, UDiv, URem, and Sub. This allows instcombine and dagcombine to eliminate sign-extension operations in several new cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Teach DAGCombine to convert (sext x) to (zext x) when theDan Gohman
sign-bit of x is known to be zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Another collection of random cleanups. No functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Remove the SmallVector ctor that converts from a SmallVectorImpl. ThisChris Lattner
conversion open the door for many nasty implicit conversion issues, and can be easily solved by initializing with (V.begin(), V.end()) when needed. This patch includes many small cleanups for sdisel also. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50340 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28switch RegsForValue::Regs to be a SmallVector to avoidChris Lattner
heap thrash on tiny (usually single-element) vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50335 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27move static function out of anon namespace, no functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50330 91177308-0d34-0410-b5e6-96231b3b80d8
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