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path: root/lib/CodeGen/SelectionDAG
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2008-10-07Use Dan's supperior checkAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57255 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07No need for |=Andrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07Use ADDC if it is valid at any smaller size. Do it right this timeAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57248 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07Use ADDC if it is valid at any smaller size. fixes ↵Andrew Lenharth
test/Codegen/Generic/i128-addsub.ll on x86 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57247 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07Expand arith on machines without carry flagsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57243 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-07Correctly handle calls with no return values. This fixesDan Gohman
2006-01-23-UnionInit on x86-64 when inlining is not enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-04wrap some long lines and expand i32 mul's to libcalls, inspired by aChris Lattner
patch by Mikael Lepisto! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57077 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-04Fix fast-isel's handling of atomic instructions. They mayDan Gohman
expand to multiple basic blocks, in which case fast-isel needs to informed of which block to use as it resumes inserting instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57040 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Pass MemOperand through for 64-bit atomics on 32-bit,Dale Johannesen
incidentally making the case where the memop is a pointer deref work. Fix cmp-and-swap regression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57027 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Use -1ULL instead of uint64_t(-1), at Anton's suggestion.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57021 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03The result of getSetCCResultType (eg: i32) may be largerDuncan Sands
than the type an i1 is promoted to (eg: i8). Account for this. Noticed by Tilmann Scheller on CellSPU; he will hopefully take care of fixing this in LegalizeDAG and adding a testcase! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56997 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Implement fast-isel support for zero-extending from i1.Dan Gohman
It turns out that this is a fairly common operation, and it's easy enough to handle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56990 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-02Optimize conditional branches in X86FastISel. This replacesDan Gohman
sequences like this: sete %al testb %al, %al jne LBB11_1 with this: je LBB11_1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56969 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-02Handle some 64-bit atomics on x86-32, some of the time.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01Make some implicit conversions explicit, to avoid compiler warnings.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01Fold trivial two-operand tokenfactors where the operands are equalDan Gohman
immediately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56921 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01Fix typos in comments.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56919 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01Implement the -fno-builtin option in the front-end, not in the back-end.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56900 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30- Initialize "--no-builtin" to "false".Bill Wendling
- Testcase for r56885. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30Add the new `-no-builtin' flag. This flag is meant to mimic the GCCBill Wendling
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero" instead of "__bzero" on Darwin10+. This arguably violates the meaning of this flag, but is currently sufficient. The meaning of this flag should become more specific over time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56885 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30Move the primary fast-isel top-level comments to FastISel.cpp, whereDan Gohman
they'll be a little more visible. Also, update and reword them a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56877 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30Optimize SelectionDAG's AssignTopologicalOrder even further.Dan Gohman
Completely eliminate the TopOrder std::vector. Instead, sort the AllNodes list in place. This also eliminates the need to call AllNodes.size(), a linear-time operation, before performing the sort. Also, eliminate the Sources temporary std::vector, since it essentially duplicates the sorted result as it is being built. This also changes the direction of the topological sort from bottom-up to top-down. The AllNodes list starts out in roughly top-down order, so this reduces the amount of reordering needed. Top-down is also more convenient for Legalize, and ISel needed only minor adjustments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29Remove misuse of ReplaceNodeResults for atomics withDale Johannesen
valid types. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29Fix FastISel to not initialize the PIC-base register multiple timesDan Gohman
in functions with PIC references from more than one basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling
llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman
consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng
disabled when frame address is desired. Also add support for depth > 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26Add "inreg" field to CallSDNode (doesn't increaseDale Johannesen
its size). Adjust various lowering functions to pass this info through from CallInst. Use it to implement sseregparm returns on X86. Remove X86_ssecall calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 Large mechanical patch.Devang Patel
s/ParamAttr/Attribute/g s/PAList/AttrList/g s/FnAttributeWithIndex/AttributeWithIndex/g s/FnAttr/Attribute/g This sets the stage - to implement function notes as function attributes and - to distinguish between function attributes and return value attributes. This requires corresponding changes in llvm-gcc and clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56622 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25Accept 'inreg' attribute on x86 functions asDale Johannesen
meaning sse_regparm (i.e. float/double values go in XMM0 instead of ST0). Update documentation to reflect reality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56619 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25Support for i1 XOR in FastISel. It is actually safe becauseDan Gohman
i1 operands are assumed to already by zero-extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56615 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25Don't print fast-isel debug messages by default. Thanks Chris!Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56614 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25Don't forget the newline in debug output.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25FastISel support for debug info.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25bug 2812: Segmentation fault on a big emdiam processor.Richard Pennington
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56609 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25Fix a recent fast-isel coverage regression - don't bail out beforeDan Gohman
giving the target a chance to materialize constants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56605 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25Enable DeadMachineInstructionElim when Fast-ISel is enabled.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25<rdar://problem/6234798> Assertion failed: ↵Evan Cheng
(!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!") git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56597 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Remove SelectionDag early allocation of registersDale Johannesen
for earlyclobbers. Teach Local RA about earlyclobber, and add some tests for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56592 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Reapplying r56550Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Forgot this part with my last patch. Sorry about the breakage.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Temporarily revert r56550 until missing commit can be added.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Refactor the constant folding code into it's own function. And call it from bothBill Wendling
the SelectionDAG and DAGCombiner code. The only functionality change is that now the DAG combiner is performing the constant folding for these operations instead of being a no-op. This is *not* in response to a bug, so there isn't a testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Next round of earlyclobber handling. Approach theDale Johannesen
RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Properly handle 'm' inline asm constraints. If a GV is being selected for ↵Evan Cheng
the addressing mode, it requires the same logic for PIC relative addressing, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23s/ParameterAttributes/Attributes/gDevang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Arrange for FastISel code to have access to the MachineModuleInfoDan Gohman
object. This will be needed to support debug info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Replace the LiveRegs SmallSet with a simple counter that keepsDan Gohman
track of the number of live registers, which is all the set was being used for. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Fix the alignment of loads from constant pool entries when theDan Gohman
load address has an offset from the base of the constant pool entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56479 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Make log, log2, log10, exp, exp2 use Expand byDale Johannesen
default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
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